Rajeev Barua

Affiliations:

Electrical and Computer Engineering

University of Maryland, College Park, College Park, MD

Google:

Bio:

Barua, Rajeev K. (Rajeev Kumar) Maps : a compiler-managed memory system for software-exposed architectures Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000.

Tree Publications Similar researchers PubMed Report error

Parents

Anant Agarwal	grad student	2000	MIT (Computer Science Tree)
(Maps : a compiler-managed memory system for software-exposed architectures)
Saman Amarasinghe	grad student	2000	MIT (Computer Science Tree)

Children

Steve Haga	grad student	2005	University of Maryland
Sumesh Udayakumaran	grad student	2006	University of Maryland
Angel Dominguez	grad student	2007	University of Maryland
George C. Caragea	grad student	2011	University of Maryland
Matthew S. Simpson	grad student	2011	University of Maryland
Kapil Anand	grad student	2013	University of Maryland
Aparna Kotha	grad student	2013	University of Maryland
Khaled ElWazeer	grad student	2014	University of Maryland

Collaborators

BETA: Related publications

Publications

You can help our author matching system! If you notice any publications incorrectly attributed to this author, please sign in and mark matches as correct or incorrect.
Ghanim F, Vishkin U, Barua R. (2018) Easy PRAM-Based High-Performance Parallel Programming with ICE Ieee Transactions On Parallel and Distributed Systems. 29: 377-390
Anand K, Elwazeer K, Kotha A, et al. (2016) A Stack Memory Abstraction and Symbolic Analysis Framework for Executables Acm Transactions On Software Engineering and Methodology. 25: 19
Anand K, Barua R. (2015) Instruction-cache locking for improving embedded systems performance Acm Transactions On Embedded Computing Systems. 14
Kotha A, Anand K, Creech T, et al. (2015) Affine Parallelization Using Dependence and Cache Analysis in a Binary Rewriter Ieee Transactions On Parallel and Distributed Systems. 26: 2154-2163
Sharma A, Smith D, Koehler J, et al. (2014) Affine loop optimization based on modulo unrolling in Chapel Acm International Conference Proceeding Series. 2014
Tzannes A, Caragea GC, Vishkin U, et al. (2014) Lazy scheduling: A runtime adaptive scheduler for declarative parallelism Acm Transactions On Programming Languages and Systems. 36
Yoo K, Barua R. (2014) Recovery of object oriented features from C++ Binaries Proceedings - Asia-Pacific Software Engineering Conference, Apsec. 1: 231-238
Kotha A, Anand K, Creech T, et al. (2014) Affine parallelization of loops with run-time dependent bounds from binaries Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 8410: 554-574
Creech T, Kotha A, Barua R. (2013) Efficient multiprogramming for multicores with SCAF Micro 2013 - Proceedings of the 46th Annual Ieee/Acm International Symposium On Microarchitecture. 334-345
Anand K, Smithson M, Elwazeer K, et al. (2013) A compiler-level intermediate representation based binary analysis and rewriting system Proceedings of the 8th Acm European Conference On Computer Systems, Eurosys 2013. 295-308