Mohamed Elzeftawi, Ph.D.
Affiliations: | 2012 | Electrical & Computer Engineering | University of California, Santa Barbara, Santa Barbara, CA, United States |
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"Mohamed Elzeftawi"Parents
Sign in to add mentor| Luke Theogarajan | grad student | 2012 | UC Santa Barbara | |
| (Compact Low-Power Low-Noise Neural Recording Wireless Channel for High Density Neural Implants (HDNIs).) | ||||
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| Frans Y, Shin J, Zhou L, et al. (2017) A 56-Gb/s PAM4 Wireline Transceiver Using a 32-Way Time-Interleaved SAR ADC in 16-nm FinFET Ieee Journal of Solid-State Circuits. 52: 1101-1110 |
| Frans Y, McLeod S, Hedayati H, et al. (2016) A 40-to-64 Gb/s NRZ Transmitter With Supply-Regulated Front-End in 16 nm FinFET Ieee Journal of Solid-State Circuits |
| Frans Y, McLeod S, Hedayati H, et al. (2016) 3.7 A 40-to-64Gb/s NRZ transmitter with supply-regulated front-end in 16nm FinFET Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 59: 68-70 |
| Elzeftawi M, Theogarajan L. (2015) Low-power building blocks for neural recording systems Handbook of Bioelectronics: Directly Interfacing Electronics and Biological Systems. 400-413 |
| Elzeftawi M, Theogarajan L. (2013) A 10pJ/bit 135Mbps IR-UWB transmitter using pulse position modulation and with on-chip LDO regulator in 0.13μm CMOS for biomedical implants Biowireless 2013 - Proceedings: 2013 Ieee Topical Conference On Biomedical Wireless Technologies, Networks, and Sensing Systems - 2013 Ieee Radio and Wireless Week, Rww 2013. 37-39 |
| Elzeftawi M, Beach S, Wang L, et al. (2012) A 1.3μW 0.0075mm2 neural amplifier and capacitor-integrated electrodes for high density neural implant recording 2012 Ieee Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems For Better Life and Better Environment, Biocas 2012 - Conference Publications. 236-239 |
| Elzeftawi MN, Yue CP, Theogarajan L. (2010) Design challenges for sense amplifier and wireless link in high-density neural recording implants Proceedings of 2010 International Symposium On Vlsi Design, Automation and Test, Vlsi-Dat 2010. 61-64 |