Chuan Xu, Ph.D.

Affiliations: 
2012 Electrical & Computer Engineering University of California, Santa Barbara, Santa Barbara, CA, United States 
Area:
Computer Engineering/ Electronics & Photonics
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"Chuan Xu"

Parents

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Kaustav Banerjee grad student 2012 UC Santa Barbara
 (Physical Modeling and RLCG Extraction of Interconnects in 3-D ICs alongside Interconnect Technology Exploration with Carbon Nanomaterials.)
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Publications

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Xu C, Kolluri SK, Endo K, et al. (2020) Correction to “Analytical Thermal Model for Self-Heating in Advanced FinFET Devices With Implications for Design and Reliability” Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 39: 277-277
Xu C, Banerjee K. (2013) Physical modeling of the capacitance and capacitive coupling noise of through-oxide vias in FDSOI-based ultra-high density 3-D ICs Ieee Transactions On Electron Devices. 60: 123-131
Xu C, Kolluri SK, Endo K, et al. (2013) Analytical thermal model for self-heating in advanced FinFET devices with implications for design and reliability Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 32: 1045-1058
Xu C, Suaya R, Banerjee K. (2012) Some clarifications on "compact modeling and analysis of through-si-via induced electrical noise coupling in three-dimensional ICs" Ieee Transactions On Electron Devices. 59: 2861-2862
Khatami Y, Li H, Xu C, et al. (2012) Metal-to-multilayer-graphene contact part II: Analysis of contact resistance Ieee Transactions On Electron Devices. 59: 2453-2460
Khatami Y, Li H, Xu C, et al. (2012) Metal-to-multilayer-graphene contact part I: Contact resistance modeling Ieee Transactions On Electron Devices. 59: 2444-2452
Xu C, Srivastava N, Suaya R, et al. (2012) Fast high-frequency impedance extraction of horizontal interconnects and inductors in 3-D ICs with multiple substrates Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 31: 1698-1710
Xu C, Suaya R, Banerjee K. (2011) Compact modeling and analysis of through-Si-Via-induced electrical noise coupling in three-dimensional ICs Ieee Transactions On Electron Devices. 58: 4024-4034
Xu C, Kourkoulos V, Suaya R, et al. (2011) A fully analytical model for the series impedance of through-silicon vias with consideration of substrate effects and coupling with horizontal interconnects Ieee Transactions On Electron Devices. 58: 3529-3540
Sarkar D, Xu C, Li H, et al. (2011) High-frequency behavior of graphene-based interconnect-sPart II: Impedance analysis and implications for inductor design Ieee Transactions On Electron Devices. 58: 853-859
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