Mohit Tiwari, Ph.D.
Affiliations: | 2011 | Computer Science | University of California, Santa Barbara, Santa Barbara, CA, United States |
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"Mohit Tiwari"Parents
Sign in to add mentorTimothy Sherwood | grad student | 2011 | UC Santa Barbara | |
(Design and Verification of Information Flow Secure Systems.) |
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Publications
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Sethumadhavan S, Tiwari M. (2019) Secure Architectures Ieee Micro |
Tiwari M, Austin T. (2016) On Architectural Support for Systems Security Ieee Micro. 36: 6-7 |
Hu W, Mu D, Oberg J, et al. (2014) Gate-level information flow tracking for security lattices Acm Transactions On Design Automation of Electronic Systems. 20 |
Li X, Kashyap V, Oberg JK, et al. (2013) Position paper: Sapper - A language for provable hardware policy enforcement Plas 2013 - Proceedings of the 2013 Acm Sigplan Workshop On Programming Languages and Analysis For Security, Co-Located With Pldi 2013. 39-44 |
Mazloom B, Mysore S, Tiwari M, et al. (2012) Dataflow tomography: Information flow tracking for understanding and visualizing full systems Transactions On Architecture and Code Optimization. 9 |
Hu W, Oberg J, Irturk A, et al. (2012) On the complexity of generating gate level information flow tracking logic Ieee Transactions On Information Forensics and Security. 7: 1067-1080 |
Wassel HMG, Dai D, Tiwari M, et al. (2012) Opportunities and challenges of using plasmonic components in nanophotonic architectures Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 2: 154-168 |
Tiwari M, Oberg JK, Li X, et al. (2011) Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security Proceedings - International Symposium On Computer Architecture. 189-199 |
Li X, Tiwari M, Oberg JK, et al. (2011) Caisson: A hardware description language for secure information flow Proceedings of the Acm Sigplan Conference On Programming Language Design and Implementation (Pldi). 109-120 |
Hu W, Oberg J, Irturk A, et al. (2011) Theoretical fundamentals of gate level information flow tracking Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 30: 1128-1140 |