Hayun C. Chung, Ph.D.
Affiliations: | 2009 | Harvard University, Cambridge, MA, United States |
Area:
Electronics and Electrical EngineeringGoogle:
"Hayun Chung"Mean distance: 8967.78
Parents
Sign in to add mentor| Gu-yeon Wei | grad student | 2009 | Harvard | |
| (Design considerations for high-speed backplane transceivers with digital adaptive equalizers.) | ||||
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Publications
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| Chung H. (2016) Non-linear MLE-based digital equaliser for ADC-based backplane receivers Electronics Letters. 52: 1106-1108 |
| Chung H, Deniz ZT, Rylyakov A, et al. (2015) A 7.5 GS/s flash ADC and a 10.24 GS/s time-interleaved ADC for backplane receivers in 65 nm CMOS Analog Integrated Circuits and Signal Processing |
| Chung H, Wei G. (2014) ADC-Based Backplane Receiver Design-Space Exploration Ieee Transactions On Very Large Scale Integration Systems. 22: 1539-1547 |
| Radecki A, Chung H, Yoshida Y, et al. (2012) 6 W/25 mm 2 Wireless Power Transmission for Non-contact Wafer-Level Testing Ieice Transactions On Electronics. 95: 668-676 |
| Chung H, Radecki A, Miura N, et al. (2012) A 0.025–0.45 W 60%-Efficiency Inductive-Coupling Power Transceiver With 5-Bit Dual-Frequency Feedforward Control for Non-Contact Memory Cards Ieee Journal of Solid-State Circuits. 47: 2496-2504 |
| Chung H, Ishikuro H, Kuroda T. (2012) A 10-Bit 80-MS/s Decision-Select Successive Approximation TDC in 65-nm CMOS Ieee Journal of Solid-State Circuits. 47: 1232-1241 |