Jianchao Lu

Affiliations: 
LinkedIn 
 Synopsys 
 2011 Electrical and Computer Engineering Drexel University, Philadelphia, PA, United States 
Google:
"Jianchao Lu"

Parents

Sign in to add mentor
Baris Taskin grad student 2011 Drexel
 (High Performance IC Clock Networks with Grid and Tree Topologies.)
BETA: Related publications

Publications

You can help our author matching system! If you notice any publications incorrectly attributed to this author, please sign in and mark matches as correct or incorrect.

Lu J, Teng Y, Taskin B. (2012) A reconfigurable clock polarity assignment flow for clock gated designs Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 1002-1011
Lu J, Mao X, Taskin B. (2012) Integrated clock mesh synthesis with incremental register placement Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 31: 217-227
Lu J, Taskin B. (2011) Clock buffer polarity assignment with skew tuning Acm Transactions On Design Automation of Electronic Systems. 16
See more...