Mostafa Rahimi Azghadi

Affiliations: 
Electrical and Electronic Engineering University of Adelaide, Adelaide, South Australia, Australia 
Area:
VLSI, Neuromorphic Engineering, Neuromorphic VLSI
Website:
http://faculties.sbu.ac.ir/~rahimi/
Google:
"Mostafa Rahimi Azghadi"
Mean distance: 20.7 (cluster 39)
 
Cross-listing: Physics Tree

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Publications

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Zhang T, Rahimi Azghadi M, Lammie C, et al. (2023) Spike sorting algorithms and their efficient hardware implementation: A comprehensive survey. Journal of Neural Engineering
Heidarpur M, Ahmadi A, Ahmadi M, et al. (2019) CORDIC-SNN: On-FPGA STDP Learning With Izhikevich Neurons Ieee Transactions On Circuits and Systems I: Regular Papers. 66: 2651-2661
Lammie C, Hamilton TJ, van Schaik A, et al. (2019) Efficient FPGA Implementations of Pair and Triplet-Based STDP for Neuromorphic Architectures Ieee Transactions On Circuits and Systems I: Regular Papers. 66: 1558-1570
Lammie C, Olsen A, Carrick T, et al. (2019) Low-Power and High-Speed Deep FPGA Inference Engines for Weed Classification at the Edge Ieee Access. 7: 51171-51184
Hashemi S, Rahimi Azghadi M, Zakerolhosseini A, et al. (2015) A novel FPGA-programmable switch matrix interconnection element in quantum-dot cellular automata International Journal of Electronics. 102: 703-724
Sayedsalehi S, Rahimi Azghadi M, Angizi S, et al. (2015) Restoring and non-restoring array divider designs in Quantum-dot Cellular Automata Information Sciences. 311: 86-101
Rahimi Azghadi M, Iannella N, Al-Sarawi S, et al. (2014) Tunable low energy, compact and high performance neuromorphic circuit for spike-based synaptic plasticity. Plos One. 9: e88326
Rahimi Azghadi M, Al-Sarawi S, Abbott D, et al. (2013) A neuromorphic VLSI design for spike timing and rate based synaptic plasticity. Neural Networks : the Official Journal of the International Neural Network Society. 45: 70-82
Rahimi Azghadi M, Al-Sarawi S, Iannella N, et al. (2012) Design and implementation of BCM rule based on spike-timing dependent plasticity Proceedings of the International Joint Conference On Neural Networks
Navi K, Foroutan V, Rahimi Azghadi M, et al. (2009) A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter Microelectronics Journal. 40: 1441-1448
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