Costas E. Goutis
Affiliations: | 1985- | Electrical and Computer Engineering | University of Patras, Panepistimioupoli Patron, Greece |
Website:
http://www.ece.upatras.gr/en/personnel/faculty.html?id=339Google:
"Costas E. Goutis"Bio:
http://www.ics.ece.upatras.gr/personnel/goutis/CV-goutis_en.pdf
Children
Sign in to add traineeRichard M. Leahy | grad student | 1984 | University of Newcastle upon Tyne (Neurotree) |
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Publications
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Kritikakou A, Catthoor F, Kelefouras V, et al. (2016) Array Size Computation under Uniform Overlapping and Irregular Accesses Acm Transactions On Design Automation of Electronic Systems. 21: 22 |
Michail HE, Athanasiou GS, Kelefouras VI, et al. (2016) Area-throughput trade-offs for SHA-1 and SHA-256 hash functions' pipelined designs Journal of Circuits, Systems, and Computers. 25: 1650032 |
Michail HE, Athanasiou GS, Theodoridis G, et al. (2016) Design and implementation of totally-self checking SHA-1 and SHA-256 hash functions’ architectures Microprocessors and Microsystems. 45: 227-240 |
Kelefouras V, Kritikakou A, Goutis C. (2015) A methodology for speeding up loop kernels by exploiting the software information and the memory architecture Computer Languages, Systems & Structures. 41: 21-41 |
Kelefouras V, Kritikakou A, Papadima E, et al. (2015) A methodology for speeding up matrix vector multiplication for single/multi-core architectures The Journal of Supercomputing. 71: 2644-2667 |
Kritikakou A, Catthoor F, Kelefouras V, et al. (2014) A scalable and near-optimal representation of access schemes for memory management Acm Transactions On Architecture and Code Optimization. 11: 13 |
Michail HE, Athanasiou G, Theodoridis G, et al. (2014) On the development of high-throughput and area-efficient multi-mode cryptographic hash designs in FPGAs Integration. 47: 387-407 |
Kelefouras V, Kritikakou A, Goutis C. (2014) A Matrix---Matrix Multiplication methodology for single/multi-core architectures using SIMD The Journal of Supercomputing. 68: 1418-1440 |
Kelefouras V, Kritikakou A, Goutis C. (2014) A methodology for speeding up edge and line detection algorithms focusing on memory architecture utilization The Journal of Supercomputing. 68: 459-487 |
Kritikakou A, Catthoor F, Kelefouras V, et al. (2013) Near-optimal and scalable intrasignal in-place optimization for non-overlapping and irregular access schemes Acm Transactions On Design Automation of Electronic Systems. 19: 4 |