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Michail Romesis, Ph.D. - Publications

Affiliations: 
2005 University of California, Los Angeles, Los Angeles, CA 
Area:
Computer system architecture, energy-efficient computing, reconfigurable computing, electronic design automation, fault-tolerant design of VLSI systems, design for nanotechnologies, design and analysis of algorithms
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10 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2006 Cong J, Romesis M, Shinnerl JR. Fast floorplanning by look-ahead enabled recursive bipartitioning Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 1719-1732. DOI: 10.1109/Tcad.2005.859519  0.491
2005 Cong J, Romesis M, Shinnerl JR. Robust mixed size placement under tight white space constraints Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 2005: 165-172. DOI: 10.1109/ICCAD.2005.1560058  0.303
2005 Chan TF, Cong J, Romesis M, Shinnerl JR, Sze K, Xie M. mPL6: A robust multilevel mixed-size placement engine Proceedings of the International Symposium On Physical Design. 227-229.  0.339
2005 Jagannathan A, Yang HH, Konigsfeld K, Milliron D, Mohan M, Romesis M, Reinman G, Cong J. Microarchitecture evaluation with floorplanning and interconnect pipelining Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 1: I8-I15.  0.529
2004 Chang CC, Cong J, Romesis M, Xie M. Optimality and Scalability Study of Existing Placement Algorithms Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 537-549. DOI: 10.1109/Tcad.2004.825870  0.476
2004 Cong J, Nataneli G, Romesis M, Shinnerl JR. An area-optimality study of floorplanning Proceedings of the International Symposium On Physical Design. 78-83.  0.401
2003 Cong J, Romesis M, Xie M. Optimality and stability study of timing-driven placement algorithms Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers. 472-478.  0.456
2003 Cong J, Jagannathan A, Reinman G, Romesis M. Microarchitecture evaluation with physical planning Proceedings - Design Automation Conference. 32-35.  0.52
2003 Cong J, Romesis M, Xie M. Optimality, scalability and stability study of partitioning and placement algorithms Proceedings of the International Symposium On Physical Design. 88-94.  0.451
2001 Cong J, Romesis M. Performance-driven multi-level clustering with application to hierarchical FPGA mapping Proceedings - Design Automation Conference. 389-394.  0.301
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