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Karthik Gururaj, Ph.D. - Publications

Affiliations: 
2013 Computer Science 0201 University of California, Los Angeles, Los Angeles, CA 
Area:
Computer system architecture, energy-efficient computing, reconfigurable computing, electronic design automation, fault-tolerant design of VLSI systems, design for nanotechnologies, design and analysis of algorithms
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13 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2014 Cong J, Grigorian B, Ghodrat MA, Gururaj K, Gill M, Reinman G. Accelerator-rich architectures: Opportunities and progresses Proceedings - Design Automation Conference. DOI: 10.1145/2593069.2596667  0.576
2013 Papakonstantinou A, Gururaj K, Stratton JA, Chen D, Cong J, Hwu WMW. Efficient compilation of CUDA kernels for high-performance computing on FPGAs Transactions On Embedded Computing Systems. 13. DOI: 10.1145/2514641.2514652  0.661
2012 Cong J, Gururaj K, Zhang P, Zou Y. Task-level data model for hardware synthesis based on concurrent collections Journal of Electrical and Computer Engineering. DOI: 10.1155/2012/691864  0.616
2011 Cong J, Gururaj K. Assuring application-level correctness against soft errors Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 150-157. DOI: 10.1109/ICCAD.2011.6105319  0.328
2011 Papakonstantinou A, Liang Y, Stratton JA, Gururaj K, Chen D, Hwu WMW, Cong J. Multilevel granularity parallelism synthesis on FPGAs Proceedings - Ieee International Symposium On Field-Programmable Custom Computing Machines, Fccm 2011. 178-185. DOI: 10.1109/FCCM.2011.29  0.501
2010 Cong J, Gururaj K, Jiang W, Liu B, Minkovich K, Yuan B, Zou Y. Accelerating Monte Carlo based SSTA using FPGA Acm/Sigda International Symposium On Field Programmable Gate Arrays - Fpga. 111-114. DOI: 10.1145/1723112.1723132  0.6
2009 Papakonstantinou A, Gururaj K, Stratton JA, Chen D, Cong J, Hwu WMW. High-performance CUDA kernel execution on FPGAs Proceedings of the International Conference On Supercomputing. 515-516. DOI: 10.1145/1542275.1542357  0.451
2009 Cong J, Gururaj K, Han G. Synthesis of reconfigurable high-performance multicore systems Proceedings of the 7th Acm Sigda International Symposium On Field-Programmable Gate Arrays, Fpga'09. 201-208. DOI: 10.1145/1508128.1508159  0.449
2009 Cong J, Gururaj K, Han G, Jiang W. Synthesis algorithm for application-specific homogeneous processor networks Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 17: 1318-1329. DOI: 10.1109/Tvlsi.2008.2004874  0.499
2009 Papakonstantinou A, Gururaj K, Stratton JA, Chen D, Cong J, Hwu WMW. FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs 2009 Ieee 7th Symposium On Application Specific Processors, Sasp 2009. 35-42. DOI: 10.1109/SASP.2009.5226333  0.515
2009 Cong J, Gururaj K, Liu B, Liu C, Zhang Z, Zhou S, Zou Y. Evaluation of static analysis techniques for fixed-point precision optimization Proceedings - Ieee Symposium On Field Programmable Custom Computing Machines, Fccm 2009. 231-234. DOI: 10.1109/FCCM.2009.35  0.337
2009 Cong J, Gururaj K. Energy efficient multiprocessor task scheduling under input-dependent variation Proceedings -Design, Automation and Test in Europe, Date. 411-416.  0.375
2008 Cong J, Gururaj K, Han G, Kaplan A, Naik M, Reinman G. MC-sim: An efficient simulation tool for MPSoC designs Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 364-371. DOI: 10.1109/ICCAD.2008.4681599  0.388
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