Year |
Citation |
Score |
2014 |
Gong F, Shi Y, Yu H, He L. Variability-aware parametric yield estimation for analog/mixed-signal circuits: Concepts, algorithms, and challenges Ieee Design and Test. 31: 6-15. DOI: 10.1109/Mdat.2014.2299279 |
0.577 |
|
2014 |
Cheng L, Xu W, Ren F, Gong F, Gupta P, He L. Statistical timing and power analysis of VLSI considering non-linear dependence Integration, the Vlsi Journal. 47: 487-498. DOI: 10.1016/J.Vlsi.2013.12.004 |
0.439 |
|
2013 |
Gong F, Basir-Kazeruni S, He L, Yu H. Stochastic behavioral modeling and analysis for analog/mixed-signal circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 32: 24-33. DOI: 10.1109/Tcad.2012.2217961 |
0.453 |
|
2013 |
Wu W, Gong F, Krishnan R, He L, Yu H. Exploiting parallelism by data dependency elimination: A case study of circuit simulation algorithms Ieee Design and Test. 30: 26-35. DOI: 10.1109/Mdt.2012.2226201 |
0.442 |
|
2013 |
Basir-Kazeruni S, Yu H, Gong F, Hu Y, Liu C, He L. SPECO: Stochastic Perturbation based Clock tree Optimization considering temperature uncertainty Integration, the Vlsi Journal. 46: 22-32. DOI: 10.1016/J.Vlsi.2012.04.004 |
0.429 |
|
2012 |
Cheng L, Xu W, Gong F, Lin Y, Wong HY, He L. Statistical timing and power optimization of architecture and device for FPGAs Acm Transactions On Reconfigurable Technology and Systems. 5. DOI: 10.1145/2209285.2209288 |
0.486 |
|
2012 |
Gong F, Liu X, Yu H, Tan SXD, Ren J, He L. A fast non-Monte-Carlo yield analysis and optimization by stochastic orthogonal polynomials Acm Transactions On Design Automation of Electronic Systems. 17. DOI: 10.1145/2071356.2071366 |
0.453 |
|
2012 |
Gong F, Yu H, Wang L, He L. A parallel and incremental extraction of variational capacitance with stochastic geometric moments Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 1729-1737. DOI: 10.1109/Tvlsi.2011.2161352 |
0.418 |
|
2012 |
Cheng L, Gong F, Xu W, Xiong J, He L, Sarrafzadeh M. Fourier series approximation for max operation in non-gaussian and quadratic statistical static timing analysis Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 1383-1391. DOI: 10.1109/Tvlsi.2011.2157843 |
0.547 |
|
2011 |
Xu W, Wang J, Hu Y, Lee JY, Gong F, He L, Sarrafzadeh M. In-place FPGA retiming for mitigation of variational single-event transient faults Ieee Transactions On Circuits and Systems I: Regular Papers. 58: 1372-1381. DOI: 10.1109/Tcsi.2010.2094370 |
0.426 |
|
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