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Tai-Cheng Lee, Ph.D. - Publications

Affiliations: 
2001 University of California, Los Angeles, Los Angeles, CA 
Area:
Analog, RF, mixed-signal integrated circuit design, dual-standard RF transceivers, phase-locked systems and frequency synthesizers, A/D and D/A converters, high-speed data communication circuits
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21 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2018 Lin C, Wei Y, Lee T. A 10-bit 2.6-GS/s Time-Interleaved SAR ADC With a Digital-Mixing Timing-Skew Calibration Technique Ieee Journal of Solid-State Circuits. 53: 1508-1517. DOI: 10.1109/Jssc.2018.2793535  0.415
2016 Chang CL, Lee TC. A Compact Multi-Input Power Conversion System with High Time-Efficiency Inductor-Sharing Technique for Thermoelectric Energy Harvesting Applications Journal of Circuits, Systems and Computers. 25. DOI: 10.1142/S0218126616400077  0.336
2016 Lin CY, Wong CH, Hsu CH, Wei YH, Lee TC. A 200-MS/s phase-detector-based comparator with 400-μVrms noise Ieee Transactions On Circuits and Systems Ii: Express Briefs. 63: 813-817. DOI: 10.1109/Tcsii.2016.2534678  0.369
2016 Chang WS, Lee TC. A 5 GHz Fractional-N ADC-Based Digital Phase-Locked Loops With-243.8 dB FOM Ieee Transactions On Circuits and Systems I: Regular Papers. DOI: 10.1109/Tcsi.2016.2599516  0.468
2016 Lin C, Lee T. A 12-bit 210-MS/s 2-Times Interleaved Pipelined-SAR ADC With a Passive Residue Transfer Technique Ieee Transactions On Circuits and Systems. 63: 929-938. DOI: 10.1109/Tcsi.2016.2546856  0.412
2016 Wu SC, Lee TC. Ultra-low-power one-pin crystal oscillator with self-charged technique Electronics Letters. 52: 325-327. DOI: 10.1049/El.2015.1703  0.332
2014 Li C, Lee T. 2.4-GHz High-Efficiency Adaptive Power Ieee Transactions On Very Large Scale Integration Systems. 22: 434-438. DOI: 10.1109/Tvlsi.2013.2238264  0.385
2014 Chang W, Huang P, Lee T. A Fractional-N Divider-Less Phase-Locked Loop With a Subsampling Phase Detector Ieee Journal of Solid-State Circuits. 49: 2964-2975. DOI: 10.1109/Jssc.2014.2359670  0.446
2013 Wong CH, Lee TC. A 6-GHz self-oscillating spread-spectrum clock generator Ieee Transactions On Circuits and Systems I: Regular Papers. 60: 1264-1273. DOI: 10.1109/Tcsi.2012.2221214  0.443
2011 Chen Z, Lee T. The Study of a Dual-Mode Ring Oscillator Ieee Transactions On Circuits and Systems Ii-Express Briefs. 58: 210-214. DOI: 10.1109/Tcsii.2011.2124650  0.335
2011 Huang Y, Lee T. A 10-bit 100-MS/s 4.5-mW Pipelined ADC With a Time-Sharing Technique Ieee Transactions On Circuits and Systems. 58: 1157-1166. DOI: 10.1109/Tcsi.2010.2092170  0.401
2011 Chen Z, Lee T. The Design and Analysis of Dual-Delay-Path Ring Oscillators Ieee Transactions On Circuits and Systems. 58: 470-478. DOI: 10.1109/Tcsi.2010.2072390  0.329
2010 Huang Y, Lee T. A 0.02-mm $^{2}$ 9-Bit 50-MS/s Cyclic ADC in 90-nm Digital CMOS Technology Ieee Journal of Solid-State Circuits. 45: 610-619. DOI: 10.1109/Jssc.2009.2039275  0.429
2009 Hung L, Lee T. A Split-Based Digital Background Calibration Technique in Pipelined ADCs Ieee Transactions On Circuits and Systems Ii-Express Briefs. 56: 855-859. DOI: 10.1109/Tcsii.2009.2034077  0.321
2009 Lee T, Hsiao K. An 8-GHz to 10-GHz Distributed DLL for Multiphase Clock Generation Ieee Journal of Solid-State Circuits. 44: 2478-2487. DOI: 10.1109/Jssc.2009.2024804  0.403
2008 Hsiao K, Lee T. The Design and Analysis of a Fully Integrated Multiplying DLL With Adaptive Current Tuning Ieee Journal of Solid-State Circuits. 43: 1427-1435. DOI: 10.1109/Jssc.2008.923737  0.424
2006 Lee T, Chen C. A mixed-signal GFSK demodulator for Bluetooth Ieee Transactions On Circuits and Systems Ii-Express Briefs. 53: 197-201. DOI: 10.1109/Tcsii.2005.858320  0.451
2006 Lee T, Hsiao K. The design and analysis of a DLL-based frequency synthesizer for UWB application Ieee Journal of Solid-State Circuits. 41: 1245-1252. DOI: 10.1109/Jssc.2006.874353  0.45
2006 Lee T, Huang Y. The design and analysis of a Miller-divider-based clock generator for MBOA-UWB application Ieee Journal of Solid-State Circuits. 41: 1253-1261. DOI: 10.1109/Jssc.2006.874279  0.425
2003 Lee T, Razavi B. A stabilization technique for phase-locked frequency synthesizers Ieee Journal of Solid-State Circuits. 38: 888-894. DOI: 10.1109/Jssc.2003.811879  0.563
2001 Lee T, Razavi B. A 125-MHz mixed-signal echo canceller for Gigabit Ethernet on copper wire Ieee Journal of Solid-State Circuits. 36: 366-373. DOI: 10.1109/4.910475  0.537
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