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Chun-Yi Lee, Ph.D. - Publications

Affiliations: 
2013 Electrical Engineering Princeton University, Princeton, NJ 
Area:
Biological & Biomedical,Computing & Networking,Energy & Environment,High-Performance Computing,Integrated Electronic Systems,Nanotechnologies,Quantum Information,Security
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5 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2015 Tang A, Yang Y, Lee CY, Jha NK. McPAT-PVT: Delay and power modeling framework for FinFET processor architectures under PVT variations Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 23: 1616-1627. DOI: 10.1109/Tvlsi.2014.2352354  0.425
2014 Lee C, Jha NK. FinCANON: A PVT-Aware Integrated Delay and Power Modeling Framework for FinFET-Based Caches and On-Chip Networks Ieee Transactions On Very Large Scale Integration Systems. 22: 1150-1163. DOI: 10.1109/Tvlsi.2013.2260569  0.462
2013 Lee C, Jha NK. Variable-Pipeline-Stage Router Ieee Transactions On Very Large Scale Integration Systems. 21: 1669-1682. DOI: 10.1109/Tvlsi.2012.2217401  0.45
2010 Lee C, Jha NK. FinFET-based power simulator for interconnection networks Acm Journal On Emerging Technologies in Computing Systems. 6: 2. DOI: 10.1145/1721650.1721652  0.454
2007 Lee C, Li JC. Design and Chip Implementation of the Segment Weighted Random BIST for Low Power Testing Journal of Low Power Electronics. 3: 206-216. DOI: 10.1166/Jolpe.2007.121  0.341
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