| Year |
Citation |
Score |
| 2020 |
Fan Q, Lilja DJ, Sapatnekar SS. Adaptive-Length Coding of Image Data for Low-Cost Approximate Storage Ieee Transactions On Computers. 69: 239-252. DOI: 10.1109/Tc.2019.2946795 |
0.32 |
|
| 2019 |
Li B, Najafi MH, Lilja DJ. Low-Cost Stochastic Hybrid Multiplier for Quantized Neural Networks Acm Journal On Emerging Technologies in Computing Systems. 15: 18. DOI: 10.1145/3309882 |
0.314 |
|
| 2019 |
Najafi MH, Jenson D, Lilja DJ, Riedel MD. Performing Stochastic Computation Deterministically Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 27: 2925-2938. DOI: 10.1109/Tvlsi.2019.2929354 |
0.378 |
|
| 2019 |
Hu J, Li B, Ma C, Lilja D, Koester SJ. Spin-Hall-Effect-Based Stochastic Number Generator for Parallel Stochastic Computing Ieee Transactions On Electron Devices. 66: 3620-3627. DOI: 10.1109/Ted.2019.2920401 |
0.353 |
|
| 2019 |
Li B, Wen H, Toussi F, Anderson C, King-Smith BA, Lilja DJ, Du DHC. NetStorage: A synchronized trace-driven replayer for network-storage system evaluation Performance Evaluation. 130: 86-100. DOI: 10.1016/J.Peva.2018.11.003 |
0.333 |
|
| 2018 |
Betzel F, Khatamifard K, Suresh H, Lilja DJ, Sartori J, Karpuzcu U. Approximate Communication: Techniques for Reducing Communication Bottlenecks in Large-Scale Parallel Systems Acm Computing Surveys. 51: 1-32. DOI: 10.1145/3145812 |
0.334 |
|
| 2018 |
Najafi MH, Lilja DJ, Riedel MD, Bazargan K. Low-Cost Sorting Network Circuits Using Unary Processing Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 26: 1471-1480. DOI: 10.1109/Tvlsi.2018.2822300 |
0.367 |
|
| 2018 |
Najafi MH, Lilja D. High Quality Down-Sampling for Deterministic Approaches to Stochastic Computing Ieee Transactions On Emerging Topics in Computing. 1-1. DOI: 10.1109/Tetc.2017.2789243 |
0.363 |
|
| 2018 |
Khatamifard SK, Najafi MH, Ghoreyshi A, Karpuzcu UR, Lilja DJ. On Memory System Design for Stochastic Computing Ieee Computer Architecture Letters. 17: 117-121. DOI: 10.1109/Lca.2018.2804926 |
0.338 |
|
| 2017 |
Najafi MH, Li P, Lilja DJ, Qian W, Bazargan K, Riedel M. A Reconfigurable Architecture with Sequential Logic-Based Stochastic Computing Acm Journal On Emerging Technologies in Computing Systems. 13: 1-28. DOI: 10.1145/3060537 |
0.409 |
|
| 2017 |
Najafi MH, Jamali-Zavareh S, Lilja DJ, Riedel MD, Bazargan K, Harjani R. Time-Encoded Values for Highly Efficient Stochastic Circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 25: 1644-1657. DOI: 10.1109/Tvlsi.2016.2645902 |
0.373 |
|
| 2017 |
Najafi MH, Lilja DJ, Riedel MD, Bazargan K. Polysynchronous Clocking: Exploiting the Skew Tolerance of Stochastic Circuits Ieee Transactions On Computers. 66: 1734-1746. DOI: 10.1109/Tc.2017.2697881 |
0.36 |
|
| 2017 |
Najafi MH, Jamali-Zavareh S, Lilja DJ, Riedel MD, Bazargan K, Harjani R. An Overview of Time-Based Computing with Stochastic Constructs Ieee Micro. 37: 62-71. DOI: 10.1109/Mm.2017.4241345 |
0.325 |
|
| 2017 |
Ma C, Tuohy W, Lilja DJ. Impact of spintronic memory on multicore cache hierarchy design Iet Computers and Digital Techniques. 11: 51-59. DOI: 10.1049/Iet-Cdt.2015.0190 |
0.346 |
|
| 2016 |
Li B, Najafi MH, Lilja DJ. Using stochastic computing to reduce the hardware requirements for a restricted boltzmann machine classifier Fpga 2016 - Proceedings of the 2016 Acm/Sigda International Symposium On Field-Programmable Gate Arrays. 36-41. DOI: 10.1145/2847263.2847340 |
0.313 |
|
| 2014 |
Li P, Lilja DJ, Qian W, Bazargan K, Riedel MD. Computation on stochastic bit streams digital image processing case studies Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 22: 449-462. DOI: 10.1109/Tvlsi.2013.2247429 |
0.38 |
|
| 2014 |
Li P, Lilja DJ, Qian W, Riedel MD, Bazargan K. Logical computation on stochastic bit streams with linear finite-state machines Ieee Transactions On Computers. 63: 1473-1485. DOI: 10.1109/Tc.2012.231 |
0.354 |
|
| 2013 |
Lilja DJ, Mirandola R. Introduction to the theme issue on performance modeling Software and Systems Modeling. 12: 679-680. DOI: 10.1007/S10270-012-0269-5 |
0.383 |
|
| 2012 |
Patil S, Lilja DJ. Statistical methods for computer performance evaluation Wiley Interdisciplinary Reviews: Computational Statistics. 4: 98-106. DOI: 10.1002/Wics.192 |
0.588 |
|
| 2011 |
Lilja DJ, Mirandola R, Sachs K. Paper Abstracts of the 2nd International Conferernce on Performance Engineering (ICPE 2011) Acm Sigsoft Software Engineering Notes. 36: 36-53. DOI: 10.1145/2020976.2069288 |
0.354 |
|
| 2011 |
Lyle A, Patil S, Harms J, Glass B, Yao X, Lilja D, Wang JP. Magnetic tunnel junction logic architecture for realization of simultaneous computation and communication Ieee Transactions On Magnetics. 47: 2970-2973. DOI: 10.1109/Tmag.2011.2158527 |
0.542 |
|
| 2011 |
Qian W, Li X, Riedel MD, Bazargan K, Lilja DJ. An architecture for fault-tolerant computation with stochastic logic Ieee Transactions On Computers. 60: 93-105. DOI: 10.1109/Tc.2010.202 |
0.365 |
|
| 2011 |
Dotan Y, Levison N, Lilja DJ. Fault tolerance for nanotechnology devices at the bit and module levels with history index of correct computation Iet Computers and Digital Techniques. 5: 221-230. DOI: 10.1049/Iet-Cdt.2010.0009 |
0.303 |
|
| 2011 |
Qian W, Riedel MD, Bazargan K, Lilja DJ. Synthesizing combinational logic to generate probabilities: Theories and algorithms Advanced Techniques in Logic Synthesis, Optimizations and Applications. 337-357. DOI: 10.1007/978-1-4419-7518-8_18 |
0.317 |
|
| 2011 |
Myre J, Walsh SDC, Lilja D, Saar MO. Performance analysis of single-phase, multiphase, and multicomponent lattice-Boltzmann fluid flow simulations on GPU clusters Concurrency and Computation: Practice and Experience. 23: 332-350. DOI: 10.1002/Cpe.1645 |
0.408 |
|
| 2010 |
Peng AS, Moen DM, Spinks JA, Meredith LM, He T, Lilja DJ. Reliable data aggregation and dissemination framework in tactical network architecture Proceedings - Ieee Military Communications Conference Milcom. 569-574. DOI: 10.1109/MILCOM.2010.5680436 |
0.72 |
|
| 2010 |
Patil S, Lilja DJ. Using resampling techniques to compute confidence intervals for the harmonic mean of rate-based performance metrics Ieee Computer Architecture Letters. 9: 1-4. DOI: 10.1109/L-Ca.2010.1 |
0.595 |
|
| 2010 |
Lyle A, Harms J, Patil S, Yao X, Lilja DJ, Wang JP. Direct communication between magnetic tunnel junctions for nonvolatile logic fan-out architecture Applied Physics Letters. 97. DOI: 10.1063/1.3499427 |
0.532 |
|
| 2010 |
Bai H, Lilja DJ, Atiquzzaman M. Cross-layer speculative architecture for end systems and gateways in computer networks with lossy links Wireless Networks. 16: 1621-1638. DOI: 10.1007/S11276-009-0218-6 |
0.335 |
|
| 2009 |
Peng AS, Moen DM, He T, Lilja DJ. Automatic dynamic resource management architecture in tactical network environments Proceedings - Ieee Military Communications Conference Milcom. DOI: 10.1109/MILCOM.2009.5379748 |
0.718 |
|
| 2009 |
Bailey P, Myre J, Walsh SDC, Lilja DJ, Saar MO. Accelerating lattice boltzmann fluid flow simulations using graphics processors Proceedings of the International Conference On Parallel Processing. 550-557. DOI: 10.1109/ICPP.2009.38 |
0.317 |
|
| 2009 |
Walsh SDC, Saar MO, Bailey P, Lilja DJ. Accelerating geoscience and engineering system simulations on graphics hardware Computers and Geosciences. 35: 2353-2364. DOI: 10.1016/J.Cageo.2009.05.001 |
0.374 |
|
| 2008 |
Mathaikutty DA, Kodakara SV, Dingankar A, Shukla SK, Lilja DJ. MMV: A metamodeling based microprocessor validation environment Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 16: 339-352. DOI: 10.1109/Tvlsi.2008.917419 |
0.783 |
|
| 2008 |
Peng AS, Eickhoff BR, Het T, Lilja DJ. Toward consolidated tactical network architecture: A modeling and simulation study Proceedings - Ieee Military Communications Conference Milcom. DOI: 10.1109/MILCOM.2008.4753109 |
0.712 |
|
| 2008 |
Sendag R, Yi JJ, Chuang PF, Lilja DJ. Low power/area branch prediction using complementary branch predictors Ipdps Miami 2008 - Proceedings of the 22nd Ieee International Parallel and Distributed Processing Symposium, Program and Cd-Rom. DOI: 10.1109/IPDPS.2008.4536323 |
0.747 |
|
| 2008 |
Debnath BK, Lilja DJ, Mokbel MF. SARD: A statistical approach for ranking database tuning parameters Proceedings - International Conference On Data Engineering. 11-18. DOI: 10.1109/ICDEW.2008.4498279 |
0.728 |
|
| 2007 |
Yi JJ, Sendag R, Lilja DJ, Hawkins DM. Speed versus accuracy trade-offs in microarchitectural simulations Ieee Transactions On Computers. 56: 1549-1563. DOI: 10.1109/Tc.2007.70744 |
0.784 |
|
| 2007 |
Peng AS, Lilja DJ. Performance Evaluation of Navy's tactical network using opnet Proceedings - Ieee Military Communications Conference Milcom. DOI: 10.1109/MILCOM.2006.302321 |
0.713 |
|
| 2007 |
Kodakara SV, Kim J, Lilja DJ, Hawkins D, Hsut WC, Yew PC. CIM: A reliable metric for evaluating program phase classifications Ieee Computer Architecture Letters. 6. DOI: 10.1109/L-Ca.2007.4 |
0.755 |
|
| 2007 |
Skarie J, Debnath BK, Lilja DJ, Mokbel MF. SCRAP: A statistical approach for creating a database query workload based on performance bottlenecks Proceedings of the 2007 Ieee International Symposium On Workload Characterization, Iiswc. 183-192. DOI: 10.1109/IISWC.2007.4362194 |
0.759 |
|
| 2007 |
Kodakara SV, Kim J, Lilja DJ, Hsu WC, Yew PC. Analysis of statistical sampling in microarchitecture simulation: Metric, methodology and program characterization Proceedings of the 2007 Ieee International Symposium On Workload Characterization, Iiswc. 139-148. DOI: 10.1109/IISWC.2007.4362190 |
0.79 |
|
| 2006 |
Yi JJ, Vandierendonck H, Eeckhout L, Lilja DJ. The exigency of benchmark and compiler drift: Designing tomorrow's processors with yesterday's tools Proceedings of the International Conference On Supercomputing. 75-86. DOI: 10.1145/1183401.1183414 |
0.519 |
|
| 2006 |
Nookala V, Lilja DJ, Sapatnekar SS. Temperature-aware floorplanning of microarchitecture blocks with IPC-power dependence modeling and transient analysis Proceedings of the International Symposium On Low Power Electronics and Design. 2006: 298-303. DOI: 10.1145/1165573.1165644 |
0.777 |
|
| 2006 |
Kleinosowski AJ, Pai VV, Rangarajan V, Ranganath P, Kleinosowski K, Subramony M, Lilja DJ. Exploring fine-grained fault tolerance for nanotechnology devices with the recursive nanobox processor grid Ieee Transactions On Nanotechnology. 5: 575-586. DOI: 10.1109/Tnano.2006.880901 |
0.758 |
|
| 2006 |
Yi JJ, Lilja DJ. Simulation of computer architectures: Simulators, benchmarks, methodologies, and recommendations Ieee Transactions On Computers. 55: 268-280. DOI: 10.1109/Tc.2006.44 |
0.631 |
|
| 2006 |
Yi JJ, Eeckhout L, Lilja DJ, Calder B, John LK, Smith JE. The future of simulation: A field of dreams? Computer. 39: 22-29. DOI: 10.1109/Mc.2006.404 |
0.622 |
|
| 2006 |
Yi JJ, Sendag R, Eeckhout L, Joshi A, Lilja DJ, John LK. Evaluating benchmark subsetting approaches Proceedings of the 2006 Ieee International Symposium On Workload Characterization, Iiswc - 2006. 93-104. DOI: 10.1109/IISWC.2006.302733 |
0.772 |
|
| 2006 |
Johnson D, Lilja DJ, Riedl J. Circulating shared-registers for multiprocessor systems Journal of Systems Architecture. 52: 152-168. DOI: 10.1016/J.Sysarc.2005.04.002 |
0.346 |
|
| 2006 |
Bai H, Atiquzzaman M, Lilja DJ. Layered view of QoS issues in IP-based mobile wireless networks: Research Articles International Journal of Communication Systems. 19: 141-161. DOI: 10.1002/Dac.V19:2 |
0.536 |
|
| 2006 |
Bai H, Atiquzzaman M, Lilja DJ. Layered view of QoS issues in IP-based mobile wireless networks International Journal of Communication Systems. 19: 141-161. DOI: 10.1002/Dac.778 |
0.503 |
|
| 2006 |
Nookala V, Chen Y, Lilja DJ, Sapatnekar SS. Comparing simulation techniques for microarchitecture-aware floorplanning Ispass 2006: Ieee International Symposium On Performance Analysis of Systems and Software, 2006. 2006: 80-88. |
0.798 |
|
| 2006 |
Yi JJ, Joshi A, Sendag R, Eeckhout L, Lilja DJ. Analyzing the processor bottlenecks in SPEC CPU 2000 2006 Spec Benchmark Workshop. |
0.77 |
|
| 2005 |
Sendag R, Chen Y, Lilja DJ. The impact of incorrectly speculated memory operations in a multithreaded architecture Ieee Transactions On Parallel and Distributed Systems. 16: 271-285. DOI: 10.1109/Tpds.2005.36 |
0.749 |
|
| 2005 |
Yi JJ, Lilja DJ, Hawkins DM. Improving computer architecture simulation methodology by adding statistical rigor Ieee Transactions On Computers. 54: 1360-1373. DOI: 10.1109/Tc.2005.184 |
0.662 |
|
| 2005 |
Eeckhout L, Sundareswarat R, Yi JJ, Lilja DJ, Schrater P. Accurate statistical approaches for generating representative workload compositions Proceedings of the 2005 Ieee International Symposium On Workload Characterization, Iiswc-2005. 2005: 56-66. DOI: 10.1109/IISWC.2005.1526001 |
0.504 |
|
| 2005 |
Chen Y, Ranganathan K, Pai VV, Lilja DJ, Bazargan K. A novel memory structure for embedded systems: Flexible sequential and random access memory Journal of Computer Science and Technology. 20: 596-606. DOI: 10.1007/S11390-005-0596-X |
0.378 |
|
| 2005 |
Nookala V, Chen Y, Lilja DJ, Sapatnekar SS. Microarchitecture-aware floorplanning using a statistical design of experiments approach Proceedings - Design Automation Conference. 579-584. |
0.788 |
|
| 2005 |
Yi JJ, Kodakara SV, Sendag R, Lilja DJ, Hawkins DM. Characterizing and comparing prevailing simulation techniques Proceedings - International Symposium On High-Performance Computer Architecture. 266-277. |
0.773 |
|
| 2005 |
Kim J, Kodakara SV, Hsu WC, Lilja DJ, Yew PC. Dynamic Code Region (DCR) based program phase tracking and prediction for dynamic optimizations Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 3793: 203-217. |
0.775 |
|
| 2004 |
Zhao Q, Lilja DJ. Static classification of value predictability using compiler hints Ieee Transactions On Computers. 53: 929-944. DOI: 10.1109/Tc.2004.49 |
0.409 |
|
| 2004 |
KleinOsowski AJ, Lilja DJ. The NanoBox project: Exploring fabrics of self-correcting logic blocks for high defect rate molecular device technologies Proceedings - Ieee Computer Society Annual Symposium On Vlsi: Emerging Trends in Vlsi Systems Design. 19-24. DOI: 10.1109/ISVLSI.2004.1339503 |
0.77 |
|
| 2004 |
Wu K, Lilja DJ, Bai H. An adaptive dual control framework for QoS design Tertiary Education and Management. 10: 217-228. DOI: 10.1007/S10586-007-0014-Y |
0.534 |
|
| 2004 |
Chen Y, Ranganathan K, Pai VV, Lilja DJ, Bazargan K. Enhancing the memory performance of embedded systems with the flexible sequential and random access memory Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 3189: 88-101. DOI: 10.1007/978-3-540-30102-8_8 |
0.374 |
|
| 2004 |
Wu K, Sendag R, Lilja DJ. Exploring memory access regularity in pointer-intensive application programs Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 2690: 472-476. |
0.712 |
|
| 2004 |
Chuang PF, Sendag R, Lilja DJ. Improving data cache performance via address correlation: An upper bound study Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 3149: 541-550. |
0.714 |
|
| 2004 |
KleinOsowski AJ, KleinOsowski K, Rangarajan V, Ranganath P, Lilja DJ. The recursive NanoBox processor grid: A reliable system architecture for unreliable nanotechnology devices Proceedings of the International Conference On Dependable Systems and Networks. 167-176. |
0.758 |
|
| 2003 |
Skadron K, Martonosi M, August DI, Hill MD, Lilja DJ, Pai VS. Challenges in computer architecture evaluation Computer. 36: 30-36. DOI: 10.1109/Mc.2003.1220579 |
0.327 |
|
| 2003 |
Sendag R, Chuang P, Lilja DJ. Address Correlation: Exceeding the Limits of Locality Ieee Computer Architecture Letters. 1: 13-16. DOI: 10.1109/L-Ca.2003.3 |
0.701 |
|
| 2003 |
Chen Y, Sendag R, Lilja DJ. Using incorrect speculation to prefetch data in a concurrent multithreaded processor Proceedings - International Parallel and Distributed Processing Symposium, Ipdps 2003. DOI: 10.1109/IPDPS.2003.1213177 |
0.732 |
|
| 2003 |
Yi JJ, Lilja DJ, Hawkins DM. A statistically rigorous approach for improving simulation methodology Proceedings - International Symposium On High-Performance Computer Architecture. 12: 281-291. DOI: 10.1109/HPCA.2003.1183546 |
0.625 |
|
| 2002 |
KleinOsowski AJ, Lilja DJ. MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research Ieee Computer Architecture Letters. 1: 7-7. DOI: 10.1109/L-Ca.2002.8 |
0.456 |
|
| 2002 |
Kazi IH, Lilja DJ. Dynamically adapting to system load and program behavior in multiprogrammed multiprocessor systems Concurrency Computation Practice and Experience. 14: 957-985. DOI: 10.1002/Cpe.699 |
0.799 |
|
| 2002 |
Yi JJ, Lilja DJ. Improving processor performance by simplifying and bypassing trivial computations Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 462-465. |
0.598 |
|
| 2002 |
Yi JJ, Sendag R, Lilja DJ. Increasing instruction-level parallelism with instruction precomputation Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 2400: 481-485. |
0.781 |
|
| 2002 |
Sendag R, Lilja DJ, Kunkel SR. Exploiting the prefetching effect provided by executing mispredicted load instructions Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 2400: 468-480. |
0.713 |
|
| 2001 |
Kazi IH, Lilja DJ. Coarse-grained thread pipelining: A speculative parallel execution model for shared-memory multiprocessors Ieee Transactions On Parallel and Distributed Systems. 12: 952-966. DOI: 10.1109/71.954629 |
0.804 |
|
| 2001 |
Yue KK, Lilja DJ. Implementing a dynamic processor allocation policy for multiprogrammed parallel applications in the Solaris™ operating system Concurrency Computation Practice and Experience. 13: 449-464. DOI: 10.1002/Cpe.585 |
0.413 |
|
| 2000 |
Kazi IH, Jose DP, Ben-Hamida B, Hescott CJ, Kwok C, Konstan JA, Lilja DJ, Yew PC. JaViz: A client/server Java profiling tool Ibm Systems Journal. 39: 96-117. DOI: 10.1147/Sj.391.0096 |
0.785 |
|
| 2000 |
Kazi IH, Chen HH, Stanley B, Lilja DJ. Techniques for obtaining high performance in Java programs Acm Computing Surveys. 32: 213-240. DOI: 10.1145/367701.367714 |
0.802 |
|
| 2000 |
Vanderwiel SP, Lilja DJ. Data prefetch mechanisms Acm Computing Surveys. 32: 196-199. DOI: 10.1145/358923.358939 |
0.365 |
|
| 2000 |
Abts D, Roberts M, Lilja DJ. A balanced approach to high-level verification: Performance trade-offs in verifying large-scale multiprocessors Proceedings of the International Conference On Parallel Processing. 2000: 505-510. DOI: 10.1109/ICPP.2000.876167 |
0.353 |
|
| 2000 |
Kazi IH, Lilja DJ. A comprehensive dynamic processor allocation scheme for multiprogrammed multiprocessor systems Proceedings of the International Conference On Parallel Processing. 2000: 153-161. DOI: 10.1109/ICPP.2000.876103 |
0.803 |
|
| 2000 |
Hamidzadeh B, Kit LY, Lilja DJ. Dynamic task scheduling using online optimization Ieee Transactions On Parallel and Distributed Systems. 11: 1151-1163. DOI: 10.1109/71.888636 |
0.33 |
|
| 2000 |
Huang J, Lilja DJ. Extending value reuse to basic blocks with compiler support Ieee Transactions On Computers. 49: 331-347. DOI: 10.1109/12.844346 |
0.421 |
|
| 2000 |
Sterström P, Hagersten E, Lilja DJ, Martonosi M, Venugopal M. Shared-memory multiprocessing: Current state and future directions Advances in Computers. 53: 1-53. DOI: 10.1016/S0065-2458(00)80003-0 |
0.328 |
|
| 1999 |
Kim J, Lilja DJ. Performance-based path determination for interprocessor communication in distributed computing systems Ieee Transactions On Parallel and Distributed Systems. 10: 316-327. DOI: 10.1109/71.755832 |
0.358 |
|
| 1999 |
Tsai JY, Huang J, Amlo C, Lilja DJ, Yew PC. The superthreaded processor architecture Ieee Transactions On Computers. 48: 881-902. DOI: 10.1109/12.795219 |
0.67 |
|
| 1999 |
Lilja DJ. Special Issue on Compilation and Architectural Support for Parallel Applications Journal of Parallel and Distributed Computing. 58: 129-131. DOI: 10.1006/Jpdc.1999.1550 |
0.347 |
|
| 1998 |
Yue KK, Lilja DJ. Comparing Processor Allocation Strategies in Multiprogrammed Shared-Memory Multiprocessors Journal of Parallel and Distributed Computing. 49: 245-258. DOI: 10.1006/Jpdc.1998.1443 |
0.446 |
|
| 1998 |
VanderWiel SP, Nathanson D, Lilja DJ. A comparative analysis of parallel programming language complexity and performance Concurrency Practice and Experience. 10: 807-820. DOI: 10.1002/(Sici)1096-9128(19980825)10:10<807::Aid-Cpe376>3.0.Co;2-2 |
0.396 |
|
| 1998 |
Tsai JY, Jiang Z, Li Z, Lilja DJ, Wang X, Yew PC, Zheng B, Schwinn SJ. Integrating parallelizing compilation technology and processor architecture for cost-effective concurrent multithreading Journal of Information Science and Engineering. 14: 205-222. |
0.614 |
|
| 1997 |
Yue KK, Lilja DJ. An effective processor allocation strategy for multiprogrammed shared-memory multiprocessors Ieee Transactions On Parallel and Distributed Systems. 8: 1246-1258. DOI: 10.1109/71.640017 |
0.335 |
|
| 1997 |
Adve SV, Burger D, Eigenmann R, Rawsthorne A, Smith MD, Gebotys CH, Kandemir MT, Lilja DJ, Choudhary AN, Fang JZ, Yew PC. Changing interaction of compiler and architecture Computer. 30: 51-58. DOI: 10.1109/2.642815 |
0.579 |
|
| 1997 |
VanderWiel SP, Lilja DJ. When caches aren't enough: Data prefetching techniques Computer. 30: 23-30. DOI: 10.1109/2.596622 |
0.325 |
|
| 1997 |
Johnson D, Lilja D, Riedl J, Anderson J. Low-Cost, High-Performance Barrier Synchronization on Networks of Workstations Journal of Parallel and Distributed Computing. 40: 131-137. DOI: 10.1006/Jpdc.1996.1273 |
0.367 |
|
| 1995 |
Mounes-Toussi F, Lilja DJ. The Potential of Compile-Time Analysis to Adapt the Cache Coherence Enforcement Strategy to the Data Sharing Characteristics Ieee Transactions On Parallel and Distributed Systems. 6: 470-481. DOI: 10.1109/71.382316 |
0.394 |
|
| 1995 |
Hamidzadeh B, Atif Y, Lilja DJ. Dynamic scheduling techniques for heterogeneous computing systems Concurrency and Computation: Practice and Experience. 7: 633-652. DOI: 10.1002/Cpe.4330070705 |
0.41 |
|
| 1995 |
Lilja DJ. Partitioning tasks between a pair of interconnected heterogeneous processors: A case study Concurrency and Computation: Practice and Experience. 7: 209-223. DOI: 10.1002/Cpe.4330070304 |
0.43 |
|
| 1994 |
Lilja DJ. The Impact of Parallel Loop Scheduling Strategies on Prefetching in a Shared Memory Multiprocessor Ieee Transactions On Parallel and Distributed Systems. 5: 573-584. DOI: 10.1109/71.285604 |
0.429 |
|
| 1994 |
Lilja DJ. Exploiting the Parallelism Available in Loops Computer. 27: 13-26. DOI: 10.1109/2.261915 |
0.443 |
|
| 1993 |
Lilja DJ. Cache Coherence in Large-Scale Shared-Memory Multiprocessors: Issues and Comparisons Acm Computing Surveys (Csur). 25: 303-338. DOI: 10.1145/158439.158907 |
0.382 |
|
| 1993 |
Lilja DJ, Yew PC. Improving Memory Utilization in Cache Coherence Directories Ieee Transactions On Parallel and Distributed Systems. 4: 1130-1146. DOI: 10.1109/71.246074 |
0.597 |
|
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