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Rahul Mishra, Ph.D. - Publications

Affiliations: 
2008 George Mason University, Washington, DC 
Area:
Electronics and Electrical Engineering
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3 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2011 Yang Y, Gauthier RJ, Chatty K, Li J, Mishra R, Mitra S, Ioannou DE. Degradation of high-κ/metal gate nMOSFETs under ESD-like stress in a 32-nm technology Ieee Transactions On Device and Materials Reliability. 11: 118-125. DOI: 10.1109/Tdmr.2010.2098407  0.502
2010 Mishra R, Ioannou DE, Mitra S, Gauthier R, Seguin C, Halbach R. ESD performance of 65 nm partially depleted n and p channel SOI MOSFETs Solid-State Electronics. 54: 357-361. DOI: 10.1016/J.Sse.2009.12.030  0.509
2010 Cilento T, Schenkel M, Yun C, Mishra R, Li J, Chatty KV, Gauthier R. Simulation of ESD protection devices in an advanced CMOS technology using a TCAD workbench based on an ESD calibration methodology Microelectronics Reliability. 50: 1367-1372. DOI: 10.1016/J.Microrel.2010.07.132  0.362
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