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Xin Sun - Publications

Affiliations: 
2010 Electrical Engineering & Computer Sciences University of California, Berkeley, Berkeley, CA, United States 
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9 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2013 Ho B, Sun X, Shin C, Liu TK. Design Optimization of Multigate Bulk MOSFETs Ieee Transactions On Electron Devices. 60: 28-33. DOI: 10.1109/Ted.2012.2224870  0.686
2012 Ho B, Sun X, Xu N, Sako T, Maekawa K, Tomoyasu M, Akasaka Y, Bonnin O, Nguyen B, Liu TK. First Demonstration of Quasi-Planar Segmented-Channel MOSFET Design for Improved Scalability Ieee Transactions On Electron Devices. 59: 2273-2276. DOI: 10.1109/Ted.2012.2201721  0.669
2011 Sun X, Moroz V, Damrongplasit N, Shin C, Liu TJK. Variation study of the planar ground-plane bulk MOSFET, SOI FinFET, and trigate bulk MOSFET designs Ieee Transactions On Electron Devices. 58: 3294-3299. DOI: 10.1109/Ted.2011.2161479  0.598
2011 Shin C, Damrongplasit N, Sun X, Tsukamoto Y, Nikolic B, Liu TJK. Performance and yield benefits of quasi-planar bulk CMOS technology for 6-T SRAM at the 22-nm node Ieee Transactions On Electron Devices. 58: 1846-1854. DOI: 10.1109/Ted.2011.2139213  0.584
2010 Sun X, Liu TK. Spacer Gate Lithography for Reduced Variability Due to Line Edge Roughness Ieee Transactions On Semiconductor Manufacturing. 23: 311-315. DOI: 10.1109/Tsm.2010.2046050  0.383
2009 Sun X, Liu TK. Scale-Length Assessment of the Trigate Bulk MOSFET Design Ieee Transactions On Electron Devices. 56: 2840-2842. DOI: 10.1109/Ted.2009.2030711  0.375
2009 Shin C, Sun X, Liu TK. Study of Random-Dopant-Fluctuation (RDF) Effects for the Trigate Bulk MOSFET Ieee Transactions On Electron Devices. 56: 1538-1542. DOI: 10.1109/Ted.2009.2020321  0.613
2008 Sun X, Lu Q, Moroz V, Takeuchi H, Gebara G, Wetzel J, Ikeda S, Shin C, King Liu TJ. Tri-gate bulk MOSFET design for CMOS scaling to the end of the roadmap Ieee Electron Device Letters. 29: 491-493. DOI: 10.1109/Led.2008.919795  0.698
2007 Sun X, Lu Q, Takeuchi H, Balasubramanian S, King Liu TJ. Selective enhancement of SiO2 etch rate by Ar-ion implantation for improved etch depth control Electrochemical and Solid-State Letters. 10: 89-91. DOI: 10.1149/1.2748634  0.665
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