Ankur Agrawal, Ph.D.
Affiliations: | 2010 | Harvard University, Cambridge, MA, United States |
Area:
Electronics and Electrical Engineering, Computer EngineeringGoogle:
"Ankur Agrawal"Mean distance: 8967.78
Parents
Sign in to add mentorGu-yeon Wei | grad student | 2010 | Harvard | |
(Design of High Speed I/O Interfaces for High Performance Microprocessors.) |
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Publications
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Dickson TO, Liu Y, Agrawal A, et al. (2016) A 1.8 pJ/bit [Formula: see text] Source-Synchronous Parallel Interface in 32 nm SOI CMOS with Receiver Redundancy for Link Recalibration Ieee Journal of Solid-State Circuits |
Dickson TO, Liu Y, Rylov SV, et al. (2015) A 1.4 pJ/bit, Power-Scalable 16×12 Gb/s Source-Synchronous I/O With DFE Receiver in 32 nm SOI CMOS Technology Ieee Journal of Solid-State Circuits |
Agrawal A, Liu A, Hanumolu PK, et al. (2009) An 8× 5 Gb/s parallel receiver with collaborative timing recovery Ieee Journal of Solid-State Circuits. 44: 3120-3130 |