Paul A. Merolla, Ph.D. - Publications

University of Pennsylvania, Philadelphia, PA, United States
Silicon Retinas, Neuromorphic Systems

13 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2016 Pedroni BU, Das S, Arthur JV, Merolla PA, Jackson BL, Modha DS, Kreutz-Delgado K, Cauwenberghs G. Mapping Generative Models onto a Network of Digital Spiking Neurons. Ieee Transactions On Biomedical Circuits and Systems. PMID 27214915 DOI: 10.1109/Tbcas.2016.2539352  1
2015 Andreopoulos A, Taba B, Cassidy AS, Alvarez-Icaza R, Flickner MD, Risk WP, Amir A, Merolla PA, Arthur JV, Berg DJ, Kusnitz JA, Datta P, Esser SK, Appuswamy R, Barch DR, et al. Visual saliency on networks of neurosynaptic cores Ibm Journal of Research and Development. 59. DOI: 10.1147/Jrd.2015.2400251  1
2015 Akopyan F, Sawada J, Cassidy A, Alvarez-Icaza R, Arthur J, Merolla P, Imam N, Nakamura Y, Datta P, Nam GJ, Taba B, Beakes M, Brezzo B, Kuang JB, Manohar R, et al. TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 34: 1537-1557. DOI: 10.1109/Tcad.2015.2474396  1
2015 Das S, Pedroni BU, Merolla P, Arthur J, Cassidy AS, Jackson BL, Modha D, Cauwenberghs G, Kreutz-Delgado K. Gibbs sampling with low-power spiking digital neurons Proceedings - Ieee International Symposium On Circuits and Systems. 2015: 2704-2707. DOI: 10.1109/ISCAS.2015.7169244  1
2014 Merolla PA, Arthur JV, Alvarez-Icaza R, Cassidy AS, Sawada J, Akopyan F, Jackson BL, Imam N, Guo C, Nakamura Y, Brezzo B, Vo I, Esser SK, Appuswamy R, Taba B, et al. Artificial brains. A million spiking-neuron integrated circuit with a scalable communication network and interface. Science (New York, N.Y.). 345: 668-73. PMID 25104385 DOI: 10.1126/Science.1254642  1
2014 Merolla P, Arthur J, Alvarez R, Bussat JM, Boahen K. A multicast tree router for multichip neuromorphic systems Ieee Transactions On Circuits and Systems I: Regular Papers. 61: 820-833. DOI: 10.1109/Tcsi.2013.2284184  1
2014 Cassidy AS, Alvarez-Icaza R, Akopyan F, Sawada J, Arthur JV, Merolla PA, Datta P, Tallada MG, Taba B, Andreopoulos A, Amir A, Esser SK, Kusnitz J, Appuswamy R, Haymes C, et al. Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ∼100× Speedup in Time-to-Solution and ∼100,000× Reduction in Energy-to-Solution International Conference For High Performance Computing, Networking, Storage and Analysis, Sc. 2015: 27-38. DOI: 10.1109/SC.2014.8  1
2014 Benjamin BV, Gao P, McQuinn E, Choudhary S, Chandrasekaran AR, Bussat JM, Alvarez-Icaza R, Arthur JV, Merolla PA, Boahen K. Neurogrid: A mixed-analog-digital multichip system for large-scale neural simulations Proceedings of the Ieee. 102: 699-716. DOI: 10.1109/JPROC.2014.2313565  1
2012 Imam N, Cleland TA, Manohar R, Merolla PA, Arthur JV, Akopyan F, Modha DS. Implementation of olfactory bulb glomerular-layer computations in a digital neurosynaptic core. Frontiers in Neuroscience. 6: 83. PMID 22685425 DOI: 10.3389/Fnins.2012.00083  1
2012 Arthur JV, Merolla PA, Akopyan F, Alvarez R, Cassidy A, Chandra S, Esser SK, Imam N, Risk W, Rubin DBD, Manohar R, Modha DS. Building block of a programmable neuromorphic substrate: A digital neurosynaptic core Proceedings of the International Joint Conference On Neural Networks. DOI: 10.1109/IJCNN.2012.6252637  1
2007 Merolla PA, Arthur JV, Shi BE, Boahen KA. Expandable networks for neuromorphic chips Ieee Transactions On Circuits and Systems I: Regular Papers. 54: 301-311. DOI: 10.1109/Tcsi.2006.887474  1
2006 Merolla PA, Boahen K. Dynamic computation in a recurrent network of heterogeneous silicon neurons Proceedings - Ieee International Symposium On Circuits and Systems. 4539-4542.  1
2005 Choi TYW, Merolla PA, Arthur JV, Boahen KA, Shi BE. Neuromorphic implementation of orientation hypercolumns Ieee Transactions On Circuits and Systems I: Regular Papers. 52: 1049-1060. DOI: 10.1109/Tcsi.2005.849136  1
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