☰

Deming Chen, Ph.D. - Publications

Affiliations: 
2005 University of California, Los Angeles, Los Angeles, CA 
Area:
Computer system architecture, energy-efficient computing, reconfigurable computing, electronic design automation, fault-tolerant design of VLSI systems, design for nanotechnologies, design and analysis of algorithms
Tree Info Similar researchers PubMed Report error

51 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Gong C, Chen Y, Lu Y, Li T, Hao C, Chen D. VecQ: Minimal Loss DNN Model Compression With Vectorized Weight Quantization Ieee Transactions On Computers. 1-1. DOI: 10.1109/Tc.2020.2995593  0.326
2019 Zheng J, Lu C, Guo J, Chen D, Guo D. A Hardware-Efficient Block Matching Algorithm and Its Hardware Design for Variable Block Size Motion Estimation in Ultra-High-Definition Video Encoding Acm Transactions On Design Automation of Electronic Systems. 24: 15. DOI: 10.1145/3290408  0.37
2019 Liang Y, He D, Zhu H, Chen D. Optimal Blocking Device Placement for Geomagnetic Disturbance Mitigation Ieee Transactions On Power Delivery. 34: 2219-2231. DOI: 10.1109/Tpwrd.2019.2930998  0.628
2019 Campbell K, Lin D, He L, Yang L, Gurumani ST, Rupnow K, Mitra S, Chen D. Hybrid Quick Error Detection: Validation and Debug of SoCs Through High-Level Synthesis Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 38: 1345-1358. DOI: 10.1109/Tcad.2018.2837103  0.615
2019 Campbell K, Lin C, Chen D. Cost-Effective Error Detection Through Mersenne Modulo Shadow Datapaths Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 38: 1056-1069. DOI: 10.1109/Tcad.2018.2834417  0.73
2019 Banerjee SS, El-Hadedy M, Lim JB, Kalbarczyk ZT, Chen D, Lumetta SS, Iyer RK. ASAP: Accelerated Short-Read Alignment on Programmable Hardware Ieee Transactions On Computers. 68: 331-346. DOI: 10.1109/Tc.2018.2875733  0.375
2018 He D, Lim BP, Yang X, Hasegawa-Johnson M, Chen D. Acoustic landmarks contain more information about the phone string than other frames for automatic speech recognition with deep neural network acoustic model. The Journal of the Acoustical Society of America. 143: 3207. PMID 29960420 DOI: 10.1121/1.5039837  0.528
2018 Gholipour M, Chen Y, Chen D. Compact Modeling to Device- and Circuit-Level Evaluation of Flexible TMD Field-Effect Transistors Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 820-831. DOI: 10.1109/Tcad.2017.2729460  0.602
2017 Lin C, Wan L, Chen D. C-Mine: Data Mining of Logic Common Cases for Improved Timing Error Resilience with Energy Efficiency Acm Transactions On Design Automation of Electronic Systems. 23: 20. DOI: 10.1145/3144534  0.728
2017 He D, Lim BPP, Yang X, Hasegawa-Johnson M, Chen D. Selecting frames for automatic speech recognition based on acoustic landmarks Journal of the Acoustical Society of America. 141: 3468-3468. DOI: 10.1121/1.4987204  0.521
2017 Kim NS, Chen D, Xiong J, Hwu WW. Heterogeneous Computing Meets Near-Memory Acceleration and High-Level Synthesis in the Post-Moore Era Ieee Micro. 37: 10-18. DOI: 10.1109/Mm.2017.3211105  0.676
2017 Campbell KA, Zuo W, Chen D. New advances of high-level synthesis for efficient and reliable hardware design Integration. 58: 189-214. DOI: 10.1016/J.Vlsi.2016.11.006  0.359
2016 Heo Y, Ramachandran A, Hwu WM, Ma J, Chen D. BLESS 2: Accurate, memory-efficient, and fast error correction method. Bioinformatics (Oxford, England). PMID 27153708 DOI: 10.1093/Bioinformatics/Btw146  0.679
2016 Chen DY, Mao CT, Tsai ML, Chen SW, Lin YS, Hsieh IC, Hung MJ, Wang CH, Wen MS, Cherng WJ, Chen TH. Clinical outcomes of drug-eluting stents versus bare-metal stents in patients with cardiogenic shock complicating acute myocardial infarction. International Journal of Cardiology. 215: 98-104. PMID 27111168 DOI: 10.1016/j.ijcard.2016.04.014  0.439
2016 Lu L, Huang YF, Chen DX, Wang M, Zou YC, Wan H, Wei LB. Astragalus polysaccharides decrease muscle wasting through Akt/mTOR, ubiquitin proteasome and autophagy signalling in 5/6 nephrectomised rats. Journal of Ethnopharmacology. PMID 27049295 DOI: 10.1016/j.jep.2016.03.068  0.311
2016 Gholipour M, Chen YY, Sangai A, Masoumi N, Chen D. Analytical SPICE-Compatible Model of Schottky-Barrier-Type GNRFETs with Performance Analysis Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 24: 650-663. DOI: 10.1109/Tvlsi.2015.2406734  0.589
2016 Chen Y, Nguyen T, Chen Y, Gurumani ST, Liang Y, Rupnow K, Cong J, Hwu W, Chen D. FCUDA-HB: Hierarchical and Scalable Bus Architecture Generation on FPGAs With the FCUDA Flow Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 35: 2032-2045. DOI: 10.1109/Tcad.2016.2552821  0.733
2016 Liang Y, Satria MT, Rupnow K, Chen D. An Accurate GPU Performance Model for Effective Control Flow Divergence Optimization Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 35: 1165-1178. DOI: 10.1109/Tcad.2015.2501303  0.378
2016 Konigsmark STC, Chen D, Wong MDF. PolyPUF: Physically Secure Self-Divergence Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 35: 1053-1066. DOI: 10.1109/Tcad.2015.2488493  0.304
2016 Luo XH, Wang W, Chen DD, Xu SY. Monte Carlo study of internal energy and specific heat of a nano-graphene bilayer in a longitudinal magnetic field Physica B: Condensed Matter. 491: 51-58. DOI: 10.1016/j.physb.2016.03.024  0.46
2016 Chen D, Zhang Z, Zhao W. Fujita-Kato theorem for the 3-D inhomogeneous Navier-Stokes equations Journal of Differential Equations. 261: 738-761. DOI: 10.1016/j.jde.2016.03.024  0.403
2016 Mokdad F, Chen DL, Liu ZY, Xiao BL, Ni DR, Ma ZY. Deformation and strengthening mechanisms of a carbon nanotube reinforced aluminum composite Carbon. 104: 64-77. DOI: 10.1016/j.carbon.2016.03.038  0.37
2016 Zhang H, Xing F, Cui HZ, Chen DZ, Ouyang X, Xu SZ, Wang JX, Huang YT, Zuo JD, Tang JN. A novel phase-change cement composite for thermal energy storage: Fabrication, thermal and mechanical properties Applied Energy. 170: 130-139. DOI: 10.1016/j.apenergy.2016.02.091  0.457
2015 Zhang Z, Chen D, Dai S, Campbell KA. High-level Synthesis for Low-power Design Ipsj Transactions On System Lsi Design Methodology. 8: 12-25. DOI: 10.2197/Ipsjtsldm.8.12  0.539
2015 Chen Y, Gurumani ST, Liang Y, Li G, Guo D, Rupnow K, Chen D. FCUDA-NoC: A Scalable and Efficient Network-on-Chip Implementation for the CUDA-to-FPGA Flow Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. DOI: 10.1109/Tvlsi.2015.2497259  0.4
2015 Liang Y, Huynh HP, Rupnow K, Goh RSM, Chen D. Efficient GPU Spatial-Temporal Multitasking Ieee Transactions On Parallel and Distributed Systems. 26: 748-760. DOI: 10.1109/Tpds.2014.2313342  0.351
2015 Chen Y, Sangai A, Rogachev A, Gholipour M, Iannaccone G, Fiori G, Chen D. A SPICE-Compatible Model of MOS-Type Graphene Nano-Ribbon Field-Effect Transistors Enabling Gate- and Circuit-Level Delay and Power Analysis Under Process Variation Ieee Transactions On Nanotechnology. 14: 1068-1082. DOI: 10.1109/Tnano.2015.2469647  0.59
2015 Liang Y, Xie X, Sun G, Chen D. An Efficient Compiler Framework for Cache Bypassing on GPUs Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 34: 1677-1690. DOI: 10.1109/Tcad.2015.2424962  0.348
2014 Heo Y, Wu XL, Chen D, Ma J, Hwu WM. BLESS: bloom filter-based error correction solution for high-throughput sequencing reads. Bioinformatics (Oxford, England). 30: 1354-62. PMID 24451628 DOI: 10.1093/Bioinformatics/Btu030  0.668
2014 Gholipour M, Masoumi N, Chen YYC, Chen D, Pourfath M. Asymmetric Gate Schottky-Barrier Graphene Nanoribbon FETs for Low-Power Design Ieee Transactions On Electron Devices. 61: 4000-4006. DOI: 10.1109/Ted.2014.2362774  0.345
2013 Papakonstantinou A, Gururaj K, Stratton JA, Chen D, Cong J, Hwu WMW. Efficient compilation of CUDA kernels for high-performance computing on FPGAs Transactions On Embedded Computing Systems. 13. DOI: 10.1145/2514641.2514652  0.74
2013 Yan T, Ma Q, Chilstedt S, Wong MDF, Chen D. A routing algorithm for graphene nanoribbon circuit Acm Transactions On Design Automation of Electronic Systems. 18: 61. DOI: 10.1145/2505056  0.302
2012 Wu XL, Heo Y, El Hajj I, Hwu WM, Chen D, Ma J. TIGER: tiled iterative genome assembler. Bmc Bioinformatics. 13: S18. PMID 23281792 DOI: 10.1186/1471-2105-13-S19-S18  0.646
2012 Liang Y, Rupnow K, Li Y, Min D, Do MN, Chen D. High-level synthesis: productivity, performance, and software constraints Journal of Electrical and Computer Engineering. 2012: 1-14. DOI: 10.1155/2012/649057  0.38
2012 Wan L, Dong C, Chen D. A Coarse-Grained Reconfigurable Architecture with Compilation for High Performance International Journal of Reconfigurable Computing. 2012: 1-17. DOI: 10.1155/2012/163542  0.675
2012 Wan L, Chen D. Analysis of Digital Circuit Dynamic Behavior With Timed Ternary Decision Diagrams for Better-Than-Worst-Case Design Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 31: 662-675. DOI: 10.1109/Tcad.2011.2181512  0.625
2011 Pattabiraman K, Saggese GP, Chen D, Kalbarczyk Z, Iyer R. Automated derivation of application-Specific error detectors using dynamic analysis Ieee Transactions On Dependable and Secure Computing. 8: 640-655. DOI: 10.1109/Tdsc.2010.19  0.327
2010 Akram S, Papakonstantinou A, Kumar R, Chen D. A workload-adaptive and reconfigurable bus architecture for multicore processors International Journal of Reconfigurable Computing. 2010: 2. DOI: 10.1155/2010/205852  0.353
2010 Chen D, Cong J, Fan Y, Wan L. LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization Ieee Transactions On Very Large Scale Integration Systems. 18: 564-577. DOI: 10.1109/Tvlsi.2009.2013353  0.734
2010 Chen D, Cong J, Dong C, He L, Li F, Peng C. Technology Mapping and Clustering for FPGA Architectures With Dual Supply Voltages Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 29: 1709-1722. DOI: 10.1109/Tcad.2010.2061770  0.648
2010 Lucas G, Dong C, Chen D. Variation-Aware Placement With Multi-Cycle Statistical Timing Analysis for FPGAs Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 29: 1818-1822. DOI: 10.1109/Tcad.2010.2056411  0.513
2010 Dinh Q, Chen D, Wong MDF. A Routing Approach to Reduce Glitches in Low Power FPGAs Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 29: 235-240. DOI: 10.1109/Tcad.2009.2035564  0.339
2009 Chen D, Cromar S. An Optimal Resource Binding Algorithm with Inter-Transition Switching Activities for Low Power Journal of Low Power Electronics. 5: 454-463. DOI: 10.1166/Jolpe.2009.1044  0.313
2009 Li H, Kwon DH, Chen D, Chiu Y. A Fast Digital Predistortion Algorithm for Radio-Frequency Power Amplifier Linearization With Loop Delay Compensation Ieee Journal of Selected Topics in Signal Processing. 3: 374-383. DOI: 10.1109/Jstsp.2009.2020562  0.317
2009 Chilstedt S, Dong C, Chen D. Design and Evaluation of a Carbon Nanotube-Based Programmable Architecture International Journal of Parallel Programming. 37: 389-416. DOI: 10.1007/S10766-009-0105-X  0.482
2008 Cheng L, Chen D, Wong MDF. A fast simultaneous input vector generation and gate replacement algorithm for leakage power reduction Acm Transactions On Design Automation of Electronic Systems. 13: 34. DOI: 10.1145/1344418.1344430  0.321
2008 Cheng L, Chen D, Wong MDF. DDBDD: Delay-Driven BDD Synthesis for FPGAs Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 1203-1213. DOI: 10.1109/Tcad.2008.923088  0.361
2007 Dong C, Chen D, Haruehanroengra S, Wang W. 3-D nFPGA: A Reconfigurable Architecture for 3-D CMOS/Nanomaterial Hybrid Digital Circuits Ieee Transactions On Circuits and Systems I: Regular Papers. 54: 2489-2501. DOI: 10.1109/Tcsi.2007.907844  0.463
2006 Chen D, Cong J, Xu J. Optimal simultaneous module and multivoltage assignment for low power Acm Transactions On Design Automation of Electronic Systems. 11: 362-386. DOI: 10.1145/1142155.1142161  0.56
2005 Li F, Lin Y, He L, Chen D, Cong J. Power modeling and characteristics of field programmable gate arrays Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 24: 1712-1724. DOI: 10.1109/Tcad.2005.852293  0.614
2001 Chen D, Cong J, Ercegovac MD, Huang Z. Performance-driven mapping for CPLD architectures Acm/Sigda International Symposium On Field Programmable Gate Arrays - Fpga. 39-47. DOI: 10.1109/Tcad.2003.818120  0.521
Show low-probability matches.