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Kirill Minkovich, Ph.D. - Publications

Affiliations: 
2010 University of California, Los Angeles, Los Angeles, CA 
Area:
Computer system architecture, energy-efficient computing, reconfigurable computing, electronic design automation, fault-tolerant design of VLSI systems, design for nanotechnologies, design and analysis of algorithms
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7 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2014 Minkovich K, Thibeault CM, O'Brien MJ, Nogin A, Cho Y, Srinivasa N. HRLSim: a high performance spiking neural network simulator for GPGPU clusters. Ieee Transactions On Neural Networks and Learning Systems. 25: 316-31. PMID 24807031 DOI: 10.1109/Tnnls.2013.2276056  0.374
2013 Thibeault CM, Minkovich K, O'Brien MJ, Harris FC, Srinivasa N. Efficiently passing messages in distributed spiking neural network simulation. Frontiers in Computational Neuroscience. 7: 77. PMID 23772213 DOI: 10.3389/Fncom.2013.00077  0.413
2012 Minkovich K, Srinivasa N, Cruz-Albrecht JM, Cho Y, Nogin A. Programming time-multiplexed reconfigurable hardware using a scalable neuromorphic compiler. Ieee Transactions On Neural Networks and Learning Systems. 23: 889-901. PMID 24806761 DOI: 10.1109/Tnnls.2012.2191795  0.46
2010 Cong J, Minkovich K. LUT-based FPGA technology mapping for reliability Proceedings - Design Automation Conference. 517-522. DOI: 10.1145/1837274.1837401  0.343
2010 Cong J, Gururaj K, Jiang W, Liu B, Minkovich K, Yuan B, Zou Y. Accelerating Monte Carlo based SSTA using FPGA Acm/Sigda International Symposium On Field Programmable Gate Arrays - Fpga. 111-114. DOI: 10.1145/1723112.1723132  0.374
2008 Cong J, Minkovich K. Mapping for better than worst-case delays in LUT-based FPGA designs Acm/Sigda International Symposium On Field Programmable Gate Arrays - Fpga. 56-64. DOI: 10.1145/1344671.1344681  0.401
2007 Cong J, Minkovich K. Optimality study of logic synthesis for LUT-based FPGAs Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 230-239. DOI: 10.1109/Tcad.2006.887922  0.441
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