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Kedar K. Patel, Ph.D. - Publications

Affiliations: 
2010 Electrical Engineering & Computer Sciences University of California, Berkeley, Berkeley, CA, United States 
Area:
Energy (ENE); Integrated Circuits (INC); Physical Electronics (PHY); Semiconductor manufacturing; Solid-State Devices
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3 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2010 Patel K, Wallow T, Levinson HJ, Spanos CJ. Comparative study of line width roughness (LWR) in next-generation lithography (NGL) processes Proceedings of Spie - the International Society For Optical Engineering. 7640. DOI: 10.1117/12.848183  0.482
2010 Patel K, Lahiri SN, Spanos CJ. Robust estimation of line width roughness parameters Journal of Vacuum Science and Technology B:Nanotechnology and Microelectronics. 28: C6H18-C6H33. DOI: 10.1116/1.3517718  0.488
2008 Patel K, Liu TJK, Spanos C. Impact of gate line edge roughness on double-gate FinFET performance variability Proceedings of Spie - the International Society For Optical Engineering. 6925. DOI: 10.1117/12.773065  0.469
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