☰

Roman L. Lysecky, Ph.D. - Publications

Affiliations: 
2005 University of California, Riverside, Riverside, CA, United States 
Area:
Computer Science, Electronics and Electrical Engineering
Tree Info Similar researchers PubMed Report error

32 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Lizarraga A, Sprinkle J, Lysecky R. Automated Model-Based Optimization of Data-Adaptable Embedded Systems Acm Transactions in Embedded Computing Systems. 19: 1-22. DOI: 10.1145/3372142  0.358
2019 Lu S, Lysecky R. Data-driven Anomaly Detection with Timing Features for Embedded Systems Acm Transactions On Design Automation of Electronic Systems. 24: 33. DOI: 10.1145/3279949  0.402
2019 Nam H, Lysecky RL. Security-aware multi-objective optimization of distributed reconfigurable embedded systems Journal of Parallel and Distributed Computing. 133: 377-390. DOI: 10.1016/J.Jpdc.2018.02.015  0.434
2018 Nam H, Lysecky RL. Mixed Cryptography Constrained Optimization for Heterogeneous, Multicore, and Distributed Embedded Systems The First Computers. 7: 29. DOI: 10.3390/Computers7020029  0.456
2018 Seo M, Lysecky RL. Non-Intrusive In-Situ Requirements Monitoring of Embedded System Acm Transactions On Design Automation of Electronic Systems. 23: 58. DOI: 10.1145/3206213  0.315
2018 Rao A, Carreon N, Lysecky R, Rozenblit J. Probabilistic Threat Detection for Risk Management in Cyber-physical Medical Systems Ieee Software. 35: 38-43. DOI: 10.1109/Ms.2017.4541031  0.358
2017 Lu S, Lysecky R. Time and Sequence Integrated Runtime Anomaly Detection for Embedded Systems Acm Transactions in Embedded Computing Systems. 17: 38. DOI: 10.1145/3122785  0.413
2017 Sandoval N, Mackin C, Whitsitt S, Gopinath VS, Mahadevan S, Milakovich A, Merry K, Sprinkle J, Lysecky R. Task Transition Scheduling for Data-Adaptable Systems Acm Transactions in Embedded Computing Systems. 16: 105. DOI: 10.1145/3047498  0.341
2016 Seo M, Lysecky R. In-Situ Requirements Monitoring of Embedded Systems Ieee Embedded Systems Letters. 8: 49-52. DOI: 10.1109/Les.2016.2568042  0.427
2015 Lee JC, Lysecky R. System-Level Observation Framework for Non-Intrusive Runtime Monitoring of Embedded Systems Acm Transactions On Design Automation of Electronic Systems. 20: 42. DOI: 10.1145/2717310  0.432
2015 Ding L, Lizarraga A, Shenoy A, Gordon-Ross A, Lysecky S, Lysecky R. Application-Specific Customization of Dynamic Profiling Mechanisms for Sensor Networks Ieee Access. 3: 303-322. DOI: 10.1109/Access.2015.2422783  0.768
2014 Sun J, Lysecky R, Shankar K, Kodi A, Louri A, Roveda J. Workload assignment considering NBTI degradation in multicore systems Acm Journal On Emerging Technologies in Computing Systems. 10. DOI: 10.1145/2539124  0.373
2014 Lee JC, Vance J, Lysecky R. Hardware-based event stream ordering for system-level observation framework Ieee Embedded Systems Letters. 6: 81-84. DOI: 10.1109/Les.2014.2359154  0.389
2013 Lizarraga A, Lysecky R, Lysecky S, Gordon-Ross A. Dynamic profiling and fuzzy-logic-based optimization of sensor network platforms Acm Transactions in Embedded Computing Systems. 13: 51. DOI: 10.1145/2539036.2539047  0.764
2013 Mu J, Shankar K, Lysecky R. Profiling and online system-level performance and power estimation for dynamically adaptable embedded systems Acm Transactions in Embedded Computing Systems. 12: 85. DOI: 10.1145/2442116.2442135  0.411
2013 Sun J, Zheng R, Velamala J, Cao Y, Lysecky R, Shankar K, Roveda J. A self-tuning design methodology for power-efficient multi-core systems Acm Transactions On Design Automation of Electronic Systems. 18: 1-24. DOI: 10.1145/2390191.2390195  0.383
2013 Munir A, Gordon-Ross A, Lysecky S, Lysecky RL. A lightweight dynamic optimization methodology and application metrics estimation model for wireless sensor networks Sustainable Computing: Informatics and Systems. 3: 94-108. DOI: 10.1016/J.Suscom.2013.01.003  0.756
2012 Lizarraga A, Ding L, Hiner J, Lysecky R, Lysecky S, Gordon-Ross A. ATLeS-SN Design Automation For Embedded Systems. 16: 265-291. DOI: 10.1007/S10617-013-9109-2  0.754
2011 Nair A, Shankar K, Lysecky R. Efficient hardware-based nonintrusive dynamic application profiling Acm Transactions in Embedded Computing Systems. 10: 32. DOI: 10.1145/1952522.1952525  0.489
2010 Kalra R, Lysecky R. Configuration Locking and Schedulability Estimation for Reduced Reconfiguration Overheads of Reconfigurable Systems Ieee Transactions On Very Large Scale Integration Systems. 18: 671-674. DOI: 10.1109/Tvlsi.2009.2014068  0.423
2010 Shenoy A, Hiner J, Lysecky S, Lysecky R, Gordon-Ross A. Evaluation of Dynamic Profiling Methodologies for Optimization of Sensor Networks Ieee Embedded Systems Letters. 2: 10-13. DOI: 10.1109/Les.2010.2045634  0.762
2009 Mu J, Lysecky R. Autonomous hardware/software partitioning and voltage/frequency scaling for low-power embedded systems Acm Transactions On Design Automation of Electronic Systems. 15. DOI: 10.1145/1640457.1640459  0.446
2009 Lysecky R, Vahid F. Design and implementation of a MicroBlaze-based warp processor Transactions On Embedded Computing Systems. 8. DOI: 10.1145/1509288.1509294  0.631
2009 Saldanha L, Lysecky R. Float-to-fixed and fixed-to-float hardware converters for rapid hardware/software partitioning of floating point software applications to static and dynamic fixed point coprocessors Design Automation For Embedded Systems. 13: 139-157. DOI: 10.1007/S10617-009-9044-4  0.383
2008 Vahid F, Stitt G, Lysecky R. Warp processing: Dynamic translation of binaries to FPGA circuits Computer. 41: 40-46. DOI: 10.1109/Mc.2008.240  0.582
2008 Lysecky R. Scalability and parallel execution of warp processing: dynamic hardware/software partitioning International Journal of Parallel Programming. 36: 478-492. DOI: 10.1007/S10766-008-0079-0  0.439
2004 Zhang C, Vahid F, Lysecky R. A self-tuning cache architecture for embedded systems Proceedings - Design, Automation and Test in Europe Conference and Exhibition. 1: 142-147. DOI: 10.1145/993396.993405  0.709
2004 Lysecky R, Cotterell S, Vahid F. A Fast on-Chip Profiler Memory Using a Pipelined Binary Tree Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 12: 120-122. DOI: 10.1109/Tvlsi.2003.820522  0.579
2003 Vahid F, Lysecky R, Zhang C, Stitt G. Highly configurable platforms for embedded computing systems Microelectronics Journal. 34: 1025-1029. DOI: 10.1016/S0026-2692(03)00171-X  0.715
2002 Lysecky R, Vahid F. Prefetching for improved bus wrapper performance in cores Acm Transactions On Design Automation of Electronic Systems. 7: 58-90. DOI: 10.1145/504914.504917  0.617
2000 Lysecky RL, Vahid F, Givargis TD. Experiments with the Peripheral Virtual Component Interface Proceedings of the International Symposium On System Synthesis. 2000: 221-224. DOI: 10.1109/ISSS.2000.874053  0.714
2000 Lysecky RL, Vahid F, Givargis TD. Techniques for reducing read latency of core bus wrappers Proceedings -Design, Automation and Test in Europe, Date. 84-91. DOI: 10.1109/DATE.2000.840021  0.733
Show low-probability matches.