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Hayun C. Chung, Ph.D. - Publications

Affiliations: 
2009 Harvard University, Cambridge, MA, United States 
Area:
Electronics and Electrical Engineering
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6 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2016 Chung H. Non-linear MLE-based digital equaliser for ADC-based backplane receivers Electronics Letters. 52: 1106-1108. DOI: 10.1049/El.2016.1109  0.335
2015 Chung H, Deniz ZT, Rylyakov A, Bulzacchelli J, Friedman D, Wei GY. A 7.5 GS/s flash ADC and a 10.24 GS/s time-interleaved ADC for backplane receivers in 65 nm CMOS Analog Integrated Circuits and Signal Processing. DOI: 10.1007/S10470-015-0624-X  0.553
2014 Chung H, Wei G. ADC-Based Backplane Receiver Design-Space Exploration Ieee Transactions On Very Large Scale Integration Systems. 22: 1539-1547. DOI: 10.1109/Tvlsi.2013.2275742  0.543
2012 Radecki A, Chung H, Yoshida Y, Miura N, Shidei T, Ishikuro H, Kuroda T. 6 W/25 mm 2 Wireless Power Transmission for Non-contact Wafer-Level Testing Ieice Transactions On Electronics. 95: 668-676. DOI: 10.1587/Transele.E95.C.668  0.311
2012 Chung H, Radecki A, Miura N, Ishikuro H, Kuroda T. A 0.025–0.45 W 60%-Efficiency Inductive-Coupling Power Transceiver With 5-Bit Dual-Frequency Feedforward Control for Non-Contact Memory Cards Ieee Journal of Solid-State Circuits. 47: 2496-2504. DOI: 10.1109/Jssc.2012.2206686  0.357
2012 Chung H, Ishikuro H, Kuroda T. A 10-Bit 80-MS/s Decision-Select Successive Approximation TDC in 65-nm CMOS Ieee Journal of Solid-State Circuits. 47: 1232-1241. DOI: 10.1109/Jssc.2012.2184640  0.38
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