Year |
Citation |
Score |
2009 |
Sun J, Jiang FXC, Guan L, Xiong Z, Yan G, Sin JKO. A New Isolation Technology for Automotive Power-Integrated-Circuit Applications Ieee Transactions On Electron Devices. 56: 2144-2149. DOI: 10.1109/Ted.2009.2026089 |
0.505 |
|
2006 |
Guan L, Sin JKO, Liu H, Xiong Z. A fully integrated SOI RF MEMS technology for system-on-a-chip applications Ieee Transactions On Electron Devices. 53: 167-172. DOI: 10.1109/Ted.2005.860638 |
0.542 |
|
2005 |
Xiong Z, Liu H, Zhu C, Sin JKO. A new polysilicon CMOS self-aligned double-gate TFT technology Ieee Transactions On Electron Devices. 52: 2629-2633. DOI: 10.1109/Ted.2005.859686 |
0.447 |
|
2005 |
Guan L, Sin JKO, Xiong Z, Liu H. A novel SOI lateral-power MOSFET with a self-aligned drift region Ieee Electron Device Letters. 26: 264-266. DOI: 10.1109/Led.2005.844717 |
0.519 |
|
2004 |
Xiong Z, Liu H, Zhu C, Sin JKO. Characteristics of high-K spacer offset-gated polysilicon TFTs Ieee Transactions On Electron Devices. 51: 1304-1308. DOI: 10.1109/Ted.2004.832720 |
0.356 |
|
2004 |
Xiong Z, Liu H, Zhu C, Sin JKO. A novel self-aligned offset-gated polysilicon TFT using high-/spl kappa/ dielectric spacers Ieee Electron Device Letters. 25: 194-195. DOI: 10.1109/Led.2004.825206 |
0.358 |
|
2003 |
Liu H, Xiong Z, Sin JKO. Implementation and characterization of the double-gate MOSFET using lateral solid-phase epitaxy Ieee Transactions On Electron Devices. 50: 1552-1555. DOI: 10.1109/Ted.2003.813332 |
0.405 |
|
2003 |
Liu H, Xiong Z, Sin JKO. An ultrathin vertical channel MOSFET for sub-100-nm applications Ieee Transactions On Electron Devices. 50: 1322-1327. DOI: 10.1109/Ted.2003.813243 |
0.41 |
|
2003 |
Liu H, Xiong Z, Sin JKO. A novel ultrathin vertical channel NMOSFET with asymmetric fully overlapped LDD Ieee Electron Device Letters. 24: 84-86. DOI: 10.1109/Led.2002.808153 |
0.377 |
|
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