Xiaofang Gao, Ph.D. - Publications
Affiliations: | 2002 | University of Central Florida, Orlando, FL, United States |
Area:
Electronics and Electrical EngineeringYear | Citation | Score | |||
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2003 | Gao X, Liou JJ, Wong W, Vishwanathan S. An improved electrostatic discharge protection structure for reducing triggering voltage and parasitic capacitance Solid-State Electronics. 47: 1105-1110. DOI: 10.1016/S0038-1101(02)00486-0 | 0.502 | |||
2003 | Gao X, Liou JJ, Bernier J, Croft G, Wong W, Vishwanathan S. Optimization of on-chip ESD protection structures for minimal parasitic capacitance Microelectronics Reliability. 43: 725-733. DOI: 10.1016/S0026-2714(03)00026-X | 0.489 | |||
2002 | Gao X, Liou JJ, Bernier J, Croft G. An improved model for substrate current of submicron MOSFETs Solid-State Electronics. 46: 1395-1398. DOI: 10.1016/S0038-1101(02)00088-6 | 0.459 | |||
2002 | Liou JJ, Shireen R, Ortiz-Conde A, Sánchez FJG, Cerdeira A, Gao X, Zou X, Ho CS. Influence of polysilicon-gate depletion on the subthreshold behavior of submicron MOSFETs Microelectronics Reliability. 42: 343-347. DOI: 10.1016/S0026-2714(01)00259-1 | 0.483 | |||
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