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Bipin Rajendran, Ph.D. - Publications

Affiliations: 
2006 Stanford University, Palo Alto, CA 
Area:
Electronics and Electrical Engineering
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27 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Nandakumar SR, Le Gallo M, Piveteau C, Joshi V, Mariani G, Boybat I, Karunaratne G, Khaddam-Aljameh R, Egger U, Petropoulos A, Antonakopoulos T, Rajendran B, Sebastian A, Eleftheriou E. Mixed-Precision Deep Learning Based on Computational Memory. Frontiers in Neuroscience. 14: 406. PMID 32477047 DOI: 10.3389/Fnins.2020.00406  0.327
2020 Joshi V, Le Gallo M, Haefeli S, Boybat I, Nandakumar SR, Piveteau C, Dazzi M, Rajendran B, Sebastian A, Eleftheriou E. Accurate deep neural network inference using computational phase-change memory. Nature Communications. 11: 2473. PMID 32424184 DOI: 10.1038/S41467-020-16108-9  0.351
2020 Nandakumar SR, Boybat I, Le Gallo M, Eleftheriou E, Sebastian A, Rajendran B. Experimental Demonstration of Supervised Learning in Spiking Neural Networks with Phase-Change Memory Synapses. Scientific Reports. 10: 8080. PMID 32415108 DOI: 10.1038/S41598-020-64878-5  0.365
2020 Xu X, Rajendran B, Anantram MP. Kinetic Monte Carlo Simulation of Interface-Controlled Hafnia-Based Resistive Memory Ieee Transactions On Electron Devices. 67: 118-124. DOI: 10.1109/Ted.2019.2953917  0.311
2019 Rajendran B, Sebastian A, Schmuker M, Srinivasa N, Eleftheriou E. Low-Power Neuromorphic Hardware for Signal Processing Applications: A Review of Architectural and System-Level Design Approaches Ieee Signal Processing Magazine. 36: 97-110. DOI: 10.1109/Msp.2019.2933719  0.32
2018 Boybat I, Le Gallo M, Nandakumar SR, Moraitis T, Parnell T, Tuma T, Rajendran B, Leblebici Y, Sebastian A, Eleftheriou E. Neuromorphic computing with multi-memristive synapses. Nature Communications. 9: 2514. PMID 29955057 DOI: 10.1038/S41467-018-04933-Y  0.463
2018 Kulkarni SR, Rajendran B. Spiking neural networks for handwritten digit recognition-Supervised learning and network optimization. Neural Networks : the Official Journal of the International Neural Network Society. 103: 118-127. PMID 29674234 DOI: 10.1016/J.Neunet.2018.03.019  0.356
2018 Nandakumar SR, Kulkarni SR, Babu AV, Rajendran B. Building Brain-Inspired Computing Systems: Examining the Role of Nanoscale Devices Ieee Nanotechnology Magazine. 12: 19-35. DOI: 10.1109/Mnano.2018.2845078  0.362
2018 Nandakumar SR, Gallo ML, Boybat I, Rajendran B, Sebastian A, Eleftheriou E. A phase-change memory model for neuromorphic computing Journal of Applied Physics. 124: 152135. DOI: 10.1063/1.5042408  0.437
2018 Babu AV, Lashkare S, Ganguly U, Rajendran B. Stochastic learning in deep neural networks based on nanoscale PCMO device characteristics Neurocomputing. 321: 227-236. DOI: 10.1016/J.Neucom.2018.09.019  0.432
2017 Panwar N, Rajendran B, Ganguly U. Arbitrary Spike Time Dependent Plasticity (STDP) in Memristor by Analog Waveform Engineering Ieee Electron Device Letters. 38: 740-743. DOI: 10.1109/Led.2017.2696023  0.328
2016 S R N, Minvielle M, Nagar S, Dubourdieu C, Rajendran B. A 250 mV Cu/SiO2/W memristor with half-integer quantum conductance states. Nano Letters. PMID 26849776 DOI: 10.1021/Acs.Nanolett.5B04296  0.305
2016 S R N, Minvielle M, Nagar S, Dubourdieu C, Rajendran B. A 250 mV Cu/SiO2/W memristor with half-integer quantum conductance states. Nano Letters. PMID 26849776 DOI: 10.1021/Acs.Nanolett.5B04296  0.305
2016 Rajendran B, Alibart F. Neuromorphic Computing Based on Emerging Memory Technologies Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 6: 198-211. DOI: 10.1109/Jetcas.2016.2533298  0.434
2015 Bahl J, Rajendran B, Muralidharan B. Programming Current Reduction via Enhanced Asymmetry-Induced Thermoelectric Effects in Vertical Nanopillar Phase-Change Memory Cells Ieee Transactions On Electron Devices. 62: 4015-4021. DOI: 10.1109/Ted.2015.2486142  0.338
2015 Ostwal V, Rajendran B, Ganguly U. A circuit model for a Si-based biomimetic synaptic time-keeping device International Conference On Simulation of Semiconductor Processes and Devices, Sispad. 2015: 321-324. DOI: 10.1109/SISPAD.2015.7292324  0.337
2014 Mandal S, El-Amin A, Alexander K, Rajendran B, Jha R. Novel synaptic memory device for neuromorphic computing. Scientific Reports. 4: 5333. PMID 24939247 DOI: 10.1038/Srep05333  0.396
2014 Mandal S, El-Amin A, Alexander K, Rajendran B, Jha R. Novel synaptic memory device for neuromorphic computing. Scientific Reports. 4: 5333. PMID 24939247 DOI: 10.1038/Srep05333  0.396
2013 Jackson BL, Rajendran B, Corrado GS, Breitwisch M, Burr GW, Cheek R, Gopalakrishnan K, Raoux S, Rettner CT, Padilla A, Schrott AG, Shenoy RS, Kurdi BN, Lam CH, Modha DS. Nanoscale electronic synapses using phase change devices Acm Journal On Emerging Technologies in Computing Systems. 9. DOI: 10.1145/2463585.2463588  0.461
2013 Mandapati R, Borkar A, Srinivasan VSS, Bafna P, Karkare P, Lodha S, Rajendran B, Ganguly U. On pairing of bipolar RRAM memory with NPN selector based on set/reset array power considerations Ieee Transactions On Nanotechnology. 12: 1178-1184. DOI: 10.1109/Tnano.2013.2284508  0.332
2013 Rajendran B, Liu Y, Seo JS, Gopalakrishnan K, Chang L, Friedman DJ, Ritter MB. Specifications of nanoscale devices and circuits for neuromorphic computational systems Ieee Transactions On Electron Devices. 60: 246-253. DOI: 10.1109/Ted.2012.2227969  0.424
2011 Li L, Lu K, Rajendran B, Happ TD, Lung H, Lam C, Chan M. Driving Device Comparison for Phase-Change Memory Ieee Transactions On Electron Devices. 58: 664-671. DOI: 10.1109/Ted.2010.2100082  0.426
2011 Rajendran B, Cheek RW, Lastras LA, Franceschini MM, Breitwisch MJ, Schrott AG, Li J, Montoye RK, Chang L, Lam C. Demonstration of CAM and TCAM using phase change devices 2011 3rd Ieee International Memory Workshop, Imw 2011. DOI: 10.1109/IMW.2011.5873229  0.354
2010 Burr GW, Breitwisch MJ, Franceschini M, Garetto D, Gopalakrishnan K, Jackson B, Kurdi B, Lam C, Lastras LA, Padilla A, Rajendran B, Raoux S, Shenoy RS. Phase change memory technology Journal of Vacuum Science and Technology B:Nanotechnology and Microelectronics. 28: 223-262. DOI: 10.1116/1.3301579  0.405
2009 Rajendran B, Breitwisch M, Lee M, Burr GW, Shih Y, Cheek R, Schrott A, Chen C, Joseph E, Dasaka R, Lung H-, Lam C. Dynamic Resistance—A Metric for Variability Characterization of Phase-Change Memory Ieee Electron Device Letters. 30: 126-129. DOI: 10.1109/Led.2008.2010004  0.314
2007 Rajendran B, Shenoy RS, Witte DJ, Chokshi NS, DeLeon RL, Tompa GS, Pease RFW. Low thermal budget processing for sequential 3-D IC fabrication Ieee Transactions On Electron Devices. 54: 707-714. DOI: 10.1109/Ted.2007.891300  0.335
2007 Witte DJ, Crnogorac F, Pickard DS, Mehta A, Liu Z, Rajendran B, Pianetta P, Pease RFW. Lamellar crystallization of silicon for 3-dimensional integration Microelectronic Engineering. 84: 1186-1189. DOI: 10.1016/J.Mee.2007.01.249  0.351
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