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Laxmi N. Bhuyan - Publications

Affiliations: 
University of Louisiana at Lafayette, Lafayette, LA, United States 
 1989-2000 Texas A & M University, College Station, TX, United States 
 2001-2021 University of California, Riverside, Riverside, CA, United States 
Area:
Computer Science
Website:
https://www.cs.ucr.edu/~bhuyan/
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102 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2016 Belviranli ME, Khorasani F, Bhuyan LN, Gupta R. CuMAS: Data transfer aware multi-application scheduling for shared GPUs Proceedings of the International Conference On Supercomputing. 1. DOI: 10.1145/2925426.2926271  0.317
2016 Khorasani F, Belviranli ME, Gupta R, Bhuyan LN. Stadium Hashing: Scalable and Flexible Hashing on GPUs Parallel Architectures and Compilation Techniques - Conference Proceedings, Pact. 2016: 63-74. DOI: 10.1109/PACT.2015.13  0.312
2015 Khorasani F, Gupta R, Bhuyan LN. Efficient warp execution in presence of divergence with collaborative context collection Proceedings of the Annual International Symposium On Microarchitecture, Micro. 5: 204-215. DOI: 10.1145/2830772.2830796  0.322
2015 Belviranli ME, Deng P, Bhuyan LN, Gupta R, Zhu Q. PeerWave: Exploiting wavefront parallelism on GPUs with peer-SM synchronization Proceedings of the International Conference On Supercomputing. 2015: 25-35. DOI: 10.1145/2751205.2751243  0.359
2015 Ren S, Lin T, An W, Zhang G, Wu D, Bhuyan LN, Xu Z. Design and analysis of collaborative EPC and RAN caching for LTE mobile networks Computer Networks. 93: 80-95. DOI: 10.1016/J.Comnet.2015.10.012  0.364
2014 Pusukuri KK, Gupta R, Bhuyan LN. Shuffling: A framework for lock contention aware thread scheduling for multicore multiprocessor systems Parallel Architectures and Compilation Techniques - Conference Proceedings, Pact. 289-300. DOI: 10.1145/2628071.2628074  0.313
2014 Belviranli ME, Chou CH, Bhuyan LN, Gupta R. A paradigm shift in GP-GPU computing: Task based execution of applications with dynamic data dependencies Didc 2014 - Proceedings of the 2014 Acm International Workshop On Data Intensive Distributed Computing, Co-Located With Hpdc 2014. 29-33. DOI: 10.1145/2608020.2608024  0.345
2014 Vu D, Castillo J, Bhuyan L. An efficient dynamic scheduling scheme for H.264/AVC encoding on multi-core architecture Proceedings - Ieee International Conference On Multimedia and Expo. 2014. DOI: 10.1109/ICME.2014.6890267  0.305
2013 Belviranli ME, Bhuyan LN, Gupta R. A dynamic self-scheduling scheme for heterogeneous multiprocessor architectures Transactions On Architecture and Code Optimization. 9. DOI: 10.1145/2400682.2400716  0.323
2013 Shukla SK, Yang Y, Bhuyan LN, Brisk P. Shared memory heterogeneous computation on PCIe-supported platforms 2013 23rd International Conference On Field Programmable Logic and Applications, Fpl 2013 - Proceedings. DOI: 10.1109/FPL.2013.6645580  0.308
2013 Chou CH, Belviranli ME, Bhuyan LN. Thermal prediction and scheduling of network applications on multicore processors Ancs 2013 - Proceedings of the 9th Acm/Ieee Symposium On Architectures For Networking and Communications Systems. 115-116. DOI: 10.1109/ANCS.2013.6665188  0.306
2012 Hu Y, Bhuyan LN, Feng M. Maintaining data consistency in structured P2P systems Ieee Transactions On Parallel and Distributed Systems. 23: 2125-2137. DOI: 10.1109/TPDS.2012.81  0.305
2012 Liu B, Yuan B, Dai H, Zhao H, Yu J, Bhuyan L. Improving the throughput and delay performance of network processors by applying push model Ieee International Workshop On Quality of Service, Iwqos. DOI: 10.1109/IWQoS.2012.6245973  0.368
2012 Vu D, Kuang J, Bhuyan L. An adaptive dynamic scheduling scheme for H.264/AVC decoding on multicore architecture Proceedings - Ieee International Conference On Multimedia and Expo. 491-496. DOI: 10.1109/ICME.2012.9  0.315
2012 Liao G, Bhuyan L. Analyzing performance and power efficiency of network processing over 10 GbE Journal of Parallel and Distributed Computing. 72: 1442-1449. DOI: 10.1016/J.Jpdc.2012.02.016  0.435
2011 Guo D, Bhuyan LN. A QoS aware multicore hash scheduler for network applications Proceedings - Ieee Infocom. 1089-1097. DOI: 10.1109/INFCOM.2011.5934884  0.444
2011 Kuang J, Bhuyan L, Xie H, Guo D. E-AHRW: An energy-efficient adaptive hash scheduler for stream processing on multi-core servers Proceedings - 2011 7th Acm/Ieee Symposium On Architectures For Networking and Communications Systems, Ancs 2011. 45-56. DOI: 10.1109/ANCS.2011.15  0.343
2010 Liao G, Yu H, Bhuyan L. A new IP lookup cache for high performance ip routers Proceedings - Design Automation Conference. 338-343. DOI: 10.1145/1837274.1837361  0.332
2010 Kuang J, Bhuyan L. LATA: A LAtency and Throughput-Aware packet processing system Proceedings - Design Automation Conference. 36-41. DOI: 10.1145/1837274.1837286  0.388
2010 Hu Y, Feng M, Bhuyan LN. A balanced consistency maintenance protocol for structured P2P systems Proceedings - Ieee Infocom. DOI: 10.1109/INFCOM.2010.5462228  0.347
2010 Kuang J, Bhuyan L. Optimizing throughput and latency under given power budget for network packet processing Proceedings - Ieee Infocom. DOI: 10.1109/INFCOM.2010.5462123  0.312
2010 Yuan B, Zhao H, Hu C, Liu B, Yu J, Bhuyan L. Experience on applying push model to packet processors in high performance routers Globecom - Ieee Global Telecommunications Conference. DOI: 10.1109/GLOCOM.2010.5683145  0.444
2010 Ding JJ, Waheed A, Yao J, Bhuyan LN. Performance characterization of multi-thread and multi-core processors based XML application oriented networking systems Journal of Parallel and Distributed Computing. 70: 584-597. DOI: 10.1016/j.jpdc.2009.10.009  0.387
2010 Liao G, Bhuyan L, Wu W, Yu H, King SR. A new TCB cache to efficiently manage TCP sessions for web servers Ancs 2010 - Proceedings of the 6th Acm/Ieee Symposium On Architectures For Networking and Communications Systems.  0.346
2009 Liao G, Bhuyan L, Guo D, King SR. EINIC: An architecture for high bandwidth network I/O on multi-core processors Ancs'09: Symposium On Architecture For Networking and Communications Systems. 68-69. DOI: 10.1145/1882486.1882503  0.363
2009 Guo D, Liao G, Bhuyan LN. Performance characterization and cache-aware core scheduling in a virtualized multi-core server under 10Gbe Proceedings of the 2009 Ieee International Symposium On Workload Characterization, Iiswc 2009. 168-177. DOI: 10.1109/IISWC.2009.5306784  0.411
2008 Liao G, Guo D, Bhuyan L, King SR. Software techniques to improve virtualized I/O performance on multi-core systems Proceedings of the 4th Acm/Ieee Symposium On Architectures For Networking and Communications Systems, Ancs '08. 161-170. DOI: 10.1145/1477942.1477971  0.318
2008 Guo D, Liao G, Bhuyan LN, Liu B, Ding JJ. A scalable multithreaded L7-filter design for multi-core servers Proceedings of the 4th Acm/Ieee Symposium On Architectures For Networking and Communications Systems, Ancs '08. 60-68. DOI: 10.1145/1477942.1477952  0.314
2008 Yao J, Guo J, Bhuyan LN. Ordered Round-Robin: An efficient sequence preserving packet scheduler Ieee Transactions On Computers. 57: 1690-1703. DOI: 10.1109/TC.2008.88  0.35
2008 Xu Z, Han J, Bhuyan L. POND: The power of zone overlapping in DHT networks Proceedings of the 2008 Ieee International Conference On Networking, Architecture, and Storage - Ieee Nas 2008. 81-88. DOI: 10.1109/NAS.2008.56  0.321
2008 Waheed A, Ding JJ, Yao J, Bhuyan LN. Performance characterization of a dual quad-core based application oriented networking system Proceedings of the 2008 Ieee International Conference On Networking, Architecture, and Storage - Ieee Nas 2008. 295-302. DOI: 10.1109/NAS.2008.53  0.373
2008 Xu Z, Stefanescu D, Zhang H, Bhuyan L, Han J. PROD: Relayed file retrieving in overlay networks Ipdps Miami 2008 - Proceedings of the 22nd Ieee International Parallel and Distributed Processing Symposium, Program and Cd-Rom. DOI: 10.1109/IPDPS.2008.4536289  0.404
2008 Zhou J, Bhuyan LN, Banerjee A. An effective pointer replication algorithm in P2P networks Ipdps Miami 2008 - Proceedings of the 22nd Ieee International Parallel and Distributed Processing Symposium, Program and Cd-Rom. DOI: 10.1109/IPDPS.2008.4536227  0.361
2008 Zhang Y, Liu B, Shi L, Yao J, Bhuyan L. Quantum-Adaptive Scheduling for multi-core network processors Proceedings - the 28th International Conference On Distributed Computing Systems, Icdcs 2008. 554-561. DOI: 10.1109/ICDCS.2008.63  0.319
2008 Yao J, Ding JJ, Bhuyan LN. A novel service-aware message scheduler for cisco application oriented networking systems Proceedings - International Conference On Computer Communications and Networks, Icccn. 229-236. DOI: 10.1109/ICCCN.2008.ECP.58  0.428
2008 Yao J, Ding JJ, Bhuyan LN. Intelligent message scheduling in application oriented networking systems Ieee International Conference On Communications. 5641-5645. DOI: 10.1109/ICC.2008.1057  0.428
2008 Liu Z, Yu J, Wang X, Liu B, Bhuyan L. Revisiting the cache effect on multicore multithreaded network processors Proceedings - 11th Euromicro Conference On Digital System Design Architectures, Methods and Tools, Dsd 2008. 317-324. DOI: 10.1109/DSD.2008.41  0.33
2008 Yao J, Guo J, Bhuyan L. Fair link striping with FIFO delivery on heterogeneous channels Computer Communications. 31: 3427-3437. DOI: 10.1016/J.Comcom.2008.05.042  0.4
2007 Zhao L, Bhuyan LN, Iyer R, Makineni S, Newell D. Hardware support for accelerating data movement in server platform Ieee Transactions On Computers. 56: 740-753. DOI: 10.1109/TC.2007.1036  0.309
2007 Zhang X, Mohanty SR, Bhuyan LN. Adaptive max-min fair scheduling in buffered crossbar switches without speedup Proceedings - Ieee Infocom. 454-462. DOI: 10.1109/INFCOM.2007.60  0.327
2007 Mohanty SR, Liu C, Liu B, Bhuyan LN. Max-min utility fairness in link aggregated systems 2007 Ieee Workshop On High Performance Switching and Routing, Hpsr. 153-159. DOI: 10.1109/HPSR.2007.4281267  0.385
2006 Zhao L, Luo Y, Bhuyan LN, Iyer R. A network processor-based, content-aware switch Ieee Micro. 26: 72-84. DOI: 10.1109/MM.2006.46  0.383
2006 Yao J, Zhou J, Bhuyan L. Computing real time jobs in P2P networks Proceedings - Conference On Local Computer Networks, Lcn. 107-114. DOI: 10.1109/LCN.2006.322078  0.391
2006 Xu Z, Hu Y, Bhuyan L. Efficient server cooperation mechanism in content delivery network Conference Proceedings of the Ieee International Performance, Computing, and Communications Conference. 2006: 433-440. DOI: 10.1109/.2006.1629436  0.552
2006 Xu Z, Bhuyan L, Hu Y. Tulip: A new hash based cooperative web caching architecture Journal of Supercomputing. 35: 301-320. DOI: 10.1007/S11227-006-4671-Z  0.556
2006 Bhuyan LN. Application Oriented Networking (AON): Adding intelligence to next-generation Internet routers Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 4138: 1-2.  0.404
2005 Ravikumar VC, Mahapatra RN, Bhuyan LN. EaseCAM: An energy and storage efficient TCAM-based router architecture for IP lookup Ieee Transactions On Computers. 54: 521-533. DOI: 10.1109/Tc.2005.78  0.318
2005 Guo J, Bhuyan L, Kumar R, Basu S. QoS aware job scheduling in a cluster-based web server for multimedia applications Proceedings - 19th Ieee International Parallel and Distributed Processing Symposium, Ipdps 2005. 2005. DOI: 10.1109/IPDPS.2005.368  0.318
2005 Guo J, Yao J, Bhuyan L. An efficient packet scheduling algorithm in network processors Proceedings - Ieee Infocom. 2: 807-818. DOI: 10.1109/INFCOM.2005.1498312  0.377
2005 Mohanty SR, Bhuyan LN. On fair scheduling in heterogeneous link aggregated services Proceedings - International Conference On Computer Communications and Networks, Icccn. 2005: 199-205. DOI: 10.1109/ICCCN.2005.1523843  0.331
2005 Yao J, Luo Y, Bhuyan L, Iyer R. Optimal network processor topologies for efficient packet processing Globecom - Ieee Global Telecommunications Conference. 2: 744-749. DOI: 10.1109/GLOCOM.2005.1577739  0.379
2005 Zhang X, Bhuyan LN. Achieving fairness and throughput for best-effort traffic in input-queued crossbar switches Globecom - Ieee Global Telecommunications Conference. 1: 620-625. DOI: 10.1109/GLOCOM.2005.1577698  0.316
2005 Yao J, Bhuyan L. Distributed packet processing in P2P networks Globecom - Ieee Global Telecommunications Conference. 1: 142-147. DOI: 10.1109/GLOCOM.2005.1577369  0.324
2005 Feng W, Balaji P, Baron C, Bhuyan LN, Panda DK. Performance characterization of a 10-gigabit ethernet TOE Proceedings - Symposium On the High Performance Interconnects, Hot Interconnects. 2005: 58-63. DOI: 10.1109/CONECT.2005.30  0.4
2005 Li Z, Yan L, Bhuyan L, Iyer R. Design and implementation of a content-aware switch using a network processor Proceedings - Symposium On the High Performance Interconnects, Hot Interconnects. 2005: 79-85. DOI: 10.1109/CONECT.2005.16  0.3
2005 Zhao L, Luo Y, Bhuyan L, Iyer R. SpliceNP: A TCP splicer using a network processor 2005 Symposium On Architectures For Networking and Communications Systems, Ancs 2005. 135-143. DOI: 10.1109/ANCS.2005.4675273  0.301
2005 Zhang X, Bhuyan LN, Feng WC. Anatomy of UDP and M-VIA for cluster communication Journal of Parallel and Distributed Computing. 65: 1290-1298. DOI: 10.1016/J.Jpdc.2005.04.009  0.347
2005 Iyer R, Perdue J, Rauchwerger L, Amato NM, Bhuyan L. An experimental evaluation of the HP V-class and SGI origin 2000 multiprocessors using microbenchmarks and scientific applications International Journal of Parallel Programming. 33: 307-350. DOI: 10.1007/S10766-004-1187-0  0.45
2005 Chen X, Luo Y, Hsieh H, Bhuyan L, Balarin F. Assertion based verification and analysis of network processor architectures Design Automation For Embedded Systems. 9: 163-176. DOI: 10.1007/S10617-005-1193-5  0.408
2004 Luo Y, Yang J, Bhuyan LN, Zhao L. NePSim: A network processor simulator with a power evaluation framework Ieee Micro. 24: 34-44. DOI: 10.1109/MM.2004.52  0.309
2004 Zhang X, Bhuyan LN. An efficient scheduling algorithm for Combined Input-Crosspoint-Queued (CICQ) switches Globecom - Ieee Global Telecommunications Conference. 2: 1168-1173.  0.329
2004 Yao J, Guo J, Bhuyan L, Xu Z. Scheduling real-time multimedia tasks in network processors Globecom - Ieee Global Telecommunications Conference. 3: 1622-1628.  0.385
2004 Xu Z, Min R, Bhuyan L, Hu Y. An efficient and robust web caching system Proceedings - International Parallel and Distributed Processing Symposium, Ipdps 2004 (Abstracts and Cd-Rom). 18: 3467-3472.  0.356
2003 Xie H, Zhao L, Bhuyan L. Architectural Analysis and Instruction-Set Optimization for Design of Network Protocol Processors Hardware/Software Codesign - Proceedings of the International Workshop. 225-230. DOI: 10.1145/944645.944703  0.366
2003 Luo Y, Bhuyan LN, Chen X. Shared memory multiprocessor architectures for software IP routers Ieee Transactions On Parallel and Distributed Systems. 14: 1240-1249. DOI: 10.1109/TPDS.2003.1255636  0.406
2003 Bhuyan LN, Wang H. Switch MSHR: A technique to reduce remote read memory access time in CC-NUMA multiprocessors Ieee Transactions On Computers. 52: 617-632. DOI: 10.1109/TC.2003.1197128  0.345
2003 Zhang X, Bhuyan LN. Deficit round-robin scheduling for input-queued switches Ieee Journal On Selected Areas in Communications. 21: 584-594. DOI: 10.1109/JSAC.2003.810495  0.303
2003 Guo J, Chen F, Bhuyan L, Kumar R. A cluster-based active router architecture supporting video/audio stream transcoding service Proceedings - International Parallel and Distributed Processing Symposium, Ipdps 2003. DOI: 10.1109/IPDPS.2003.1213131  0.328
2002 Ni N, Bhuyan LN. Fair scheduling in Internet routers Ieee Transactions On Computers. 51: 686-701. DOI: 10.1109/Tc.2002.1009152  0.611
2002 Iyer R, Wang H, Bhuyan LN. Design and analysis of static memory management policies for CC-NUMA multiprocessors Journal of Systems Architecture. 48: 59-80. DOI: 10.1016/S1383-7621(02)00066-8  0.525
2002 Ni N, Bhuyan LN. Fair scheduling and buffer management in internet routers Proceedings - Ieee Infocom. 3: 1141-1150.  0.608
2001 Bhuyan L, Wang H. Execution-driven simulation of IP router architectures Proceedings - Ieee International Symposium On Network Computing and Applications, Nca 2001. 145-155. DOI: 10.1109/NCA.2001.962526  0.422
2000 Bhuyan LN, Iyer R, Wang HJ, Kumar A. Impact of CC-NUMA memory management policies on the application performance of multistage switching networks Ieee Transactions On Parallel and Distributed Systems. 11: 230-246. DOI: 10.1109/71.841740  0.349
2000 Iyer RR, Bhuyan LN. Design and evaluation of a switch cache architecture for CC-NUMA multiprocessors Ieee Transactions On Computers. 49: 779-797. DOI: 10.1109/12.868025  0.376
2000 Wang H, Bhuyan LN. CPMBK: An improved cluster-based interconnection network International Journal of Computer Applications in Technology. 13: 185-193.  0.322
1999 Chang Y, Bhuyan LN. An efficient tree cache coherence protocol for distributed shared memory multiprocessors Ieee Transactions On Computers. 48: 352-360. DOI: 10.1109/12.755001  0.331
1998 Bhuyan L, Wang H, Iyer R, Kumar A. Impact of switch design on the application performance of cache-coherent multiprocessors Proceedings of the International Parallel Processing Symposium, Ipps. 466-474. DOI: 10.1109/IPPS.1998.669958  0.399
1997 Bhuyan LN, Iyer RR, Askar T, Nanda AK, Kumar M. Performance of multistage bus networks for a distributed shared memory multiprocessor Ieee Transactions On Parallel and Distributed Systems. 8: 82-95. DOI: 10.1109/71.569657  0.456
1997 Ding JJ, Bhuyan LN. Evaluation of multi-queue buffered multistage interconnection networks under uniform and non-uniform traffic patterns International Journal of Systems Science. 28: 1115-1128.  0.34
1994 Chang Y, Bhuyan L, Kumar A. A distributed cache coherence protocol for hypercube multiprocessors Proceedings of the International Conference On Parallel Processing. 1. DOI: 10.1109/ICPP.1994.22  0.321
1994 Bhuyan L, Nanda A, Askar T. Performance and reliability of the multistage bus network Proceedings of the International Conference On Parallel Processing. 1. DOI: 10.1109/ICPP.1994.158  0.36
1994 Ding J, Bhuyan LN. Finite Buffer Analysis of Multistage Interconnection Networks Ieee Transactions On Computers. 43: 243-247. DOI: 10.1109/12.262132  0.363
1993 Das CR, Mohapatra P, Tien L, Bhuyan LN. An Availability Model for MIN-Based Multiprocessors Ieee Transactions On Parallel and Distributed Systems. 4: 1118-1129. DOI: 10.1109/71.246073  0.637
1993 Nanda AK, Bhuyan LN. Design and Analysis of Cache Coherent Multistage Interconnection Networks Ieee Transactions On Computers. 42: 458-470. DOI: 10.1109/12.214692  0.408
1991 Yang Q, Bhuyan LN. Analysis of Packet-Switched Multiple-Bus Multiprocessor Systems Ieee Transactions On Computers. 40: 352-357. DOI: 10.1109/12.76414  0.401
1991 Jiang H, Bhuyan LN, Muppala JK. MVAMIN: Mean value analysis algorithms for multistage interconnection networks Journal of Parallel and Distributed Computing. 12: 189-201. DOI: 10.1016/0743-7315(91)90124-R  0.409
1990 Ghosal D, Bhuyan LN. Performance Evaluation of a Dataflow Architecture Ieee Transactions On Computers. 39: 615-627. DOI: 10.1109/12.53575  0.632
1989 Yang Q, Bhuyan LN, Liu BC. Analysis and Comparison of Cache Coherence Protocols for a Packet-Switched Multiprocessor Ieee Transactions On Computers. 38: 1143-1153. DOI: 10.1109/12.30868  0.419
1989 Bhuyan LN, Ghosal D, Yang Q. Approximate Analysis of Single and Multiple Ring Networks Ieee Transactions On Computers. 38: 1027-1040. DOI: 10.1109/12.30853  0.604
1989 Muppala JK, Bhuyan LN. Arbiter designs for multiprocessor interconnection networks Microprocessing and Microprogramming. 26: 31-43. DOI: 10.1016/0165-6074(89)90279-2  0.388
1987 Das CR, Bhuyan LN, Sarma VVS. Effect of Maintenance on the Dependability and Performance of Mulitprocessor Systems Ieee Transactions On Reliability. 208-215. DOI: 10.1109/Tr.1987.5222343  0.542
1987 Bhuyan LN. Analysis of interconnection networks with different arbiter designs Journal of Parallel and Distributed Computing. 4: 384-403. DOI: 10.1016/0743-7315(87)90026-8  0.365
1987 Das CR, Bhuyan LN. Dependability evaluation of interconnection networks Information Sciences. 43: 107-138. DOI: 10.1016/0020-0255(87)90033-8  0.62
1987 Das CR, Bhuyan LN. Reliability and fault-tolerant issues of multiprocessor and multicomputer systems Sadhana. 11: 129-154. DOI: 10.1007/BF02811315  0.589
1987 Ghosal D, Bhuyan LN. PERFORMANCE ANALYSIS OF THE MIT TAGGED TOKEN DATAFLOW ARCHITECTURE Proceedings of the International Conference On Parallel Processing. 680-683.  0.427
1987 Yang Q, Bhuyan LN, Pavaskar R. PERFORMANCE ANALYSIS OF PACKET-SWITCHED MULTIPLE-BUS MULTIPROCESSOR SYSTEMS . 170-178.  0.381
1986 Bhuyan LN, Das CR. DEPENDABILITY EVALUATION OF MULTICOMPUTER NETWORKS Proceedings of the International Conference On Parallel Processing. 576-583.  0.579
1986 Yang Q, Ghosal D, Bhuyan LN. PERFORMANCE ANALYSIS OF MULTIPLE TOKEN RING AND MULTIPLE SLOTTED RING NETWORKS Proceedings - Computer Networking Symposium. 79-86.  0.368
1985 Das CR, Bhuyan LN. Bandwidth Availability of Multiple-Bus Multiprocessors Ieee Transactions On Computers. 918-926. DOI: 10.1109/Tc.1985.6312195  0.592
1985 Bhuyan LN. An Analysis of Processor-Memory Interconnection Networks Ieee Transactions On Computers. 279-283. DOI: 10.1109/TC.1985.1676571  0.352
1984 Bhuyan LN, Agrawal DP. Generalized Hypercube and Hyperbus Structures for a Computer Network Ieee Transactions On Computers. 323-333. DOI: 10.1109/TC.1984.1676437  0.323
1983 Bhuyan LN, Agrawal DP. Design and Performance of Generalized Interconnection Networks Ieee Transactions On Computers. 1081-1090. DOI: 10.1109/TC.1983.1676168  0.356
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