Wonwoo Ro, Ph.D.
Affiliations: | 2004 | University of Southern California, Los Angeles, CA, United States |
Area:
Electronics and Electrical EngineeringGoogle:
"Wonwoo Ro"Parents
Sign in to add mentor| Jean-Luc Gaudiot | grad student | 2004 | USC | |
| (Decoupled memory access architectures with speculative pre -execution.) | ||||
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Publications
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| Xu L, Lee J, Kim SH, et al. (2018) Architectural Protection of Application Privacy against Software and Physical Attacks in Untrusted Cloud Environment Ieee Transactions On Cloud Computing. 6: 478-491 |
| Lee S, Kim K, Koo G, et al. (2017) Improving Energy Efficiency of GPUs through Data Compression and Compressed Execution Ieee Transactions On Computers. 66: 834-847 |
| Chun S, Jung J, Seo S, et al. (2016) An adaptive plan-based approach to integrating semantic streams with remote RDF data Journal of Information Science. 43: 852-865 |
| Xu Q, Jeon H, Kim K, et al. (2016) Warped-slicer Acm Sigarch Computer Architecture News. 44: 230-242 |
| Kim M, Kim D, Kim K, et al. (2016) Exploiting Thread-Level Parallelism on HEVC by Employing a Reference Dependency Graph Ieee Transactions On Circuits and Systems For Video Technology. 26: 736-749 |
| Lee S, Ro WW. (2016) Parallel GPU Architecture Simulation Framework Exploiting Architectural-Level Parallelism with Timing Error Prediction Ieee Transactions On Computers. 65: 1253-1265 |
| Yoon MK, Kim K, Lee S, et al. (2016) Virtual Thread: Maximizing Thread-Level Parallelism beyond GPU Scheduling Limit Proceedings - 2016 43rd International Symposium On Computer Architecture, Isca 2016. 609-621 |
| Oh Y, Kim K, Yoon MK, et al. (2016) APRES: Improving Cache Efficiency by Exploiting Load Characteristics on GPUs Proceedings - 2016 43rd International Symposium On Computer Architecture, Isca 2016. 191-203 |
| Park JH, Ro WW. (2016) Accelerating forwarding computation of artificial neural network using CUDA International Conference On Electronics, Information, and Communications, Iceic 2016 |
| Lee S, Kim K, Koo G, et al. (2015) Warped-compression: Enabling power efficient GPUs through register compression Proceedings - International Symposium On Computer Architecture. 13: 502-514 |