Robert B. Staszewski, Ph.D. - Publications

Affiliations: 
2002 University of Texas at Dallas, Richardson, TX, United States 
Area:
Electronics and Electrical Engineering

203 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Nikandish GR, Staszewski RB, Zhu A. A Fully Integrated GaN Dual-Channel Power Amplifier With Crosstalk Suppression for 5G Massive MIMO Transmitters Ieee Transactions On Circuits and Systems Ii-Express Briefs. 1-1. DOI: 10.1109/Tcsii.2020.3008365  0.412
2020 Li C, Yuan M, Lin Y, Liao C, Chang C, Staszewski RB. A 0.2-V Three-Winding Transformer-Based DCO in 16-nm FinFET CMOS Ieee Transactions On Circuits and Systems Ii-Express Briefs. 1-1. DOI: 10.1109/Tcsii.2020.2989415  0.405
2020 Wang H, Nguyen V, Schembari F, Staszewski RB. An Adaptive-Resolution Quasi-Level-Crossing Delta Modulator with VCO-based Residue Quantizer Ieee Transactions On Circuits and Systems Ii-Express Briefs. 1-1. DOI: 10.1109/Tcsii.2020.2979078  0.464
2020 Un K, Zhang F, Mak P, Martins RP, Zhu A, Staszewski RB. Design Considerations of the Interpolative Digital Transmitter for Quantization Noise and Replicas Rejection Ieee Transactions On Circuits and Systems Ii: Express Briefs. 67: 37-41. DOI: 10.1109/Tcsii.2019.2903561  0.512
2020 Urso A, Chen Y, Staszewski RB, Dijkhuis JF, Stanzione S, Liu Y, Serdijn WA, Babaie M. A Switched-Capacitor DC-DC Converter Powering an LC Oscillator to Achieve 85% System Peak Power Efficiency and -65,dBc Spurious Tones Ieee Transactions On Circuits and Systems I-Regular Papers. 1-14. DOI: 10.1109/Tcsi.2020.3012106  0.468
2020 Nikandish GR, Staszewski RB, Zhu A. Broadband Fully Integrated GaN Power Amplifier With Minimum-Inductance BPF Matching and Two-Transistor AM-PM Compensation Ieee Transactions On Circuits and Systems I-Regular Papers. 1-13. DOI: 10.1109/Tcsi.2020.3002395  0.505
2020 Bagheri M, Schembari F, Pourmousavian N, Zare-Hoseini H, Hasko D, Staszewski RB. A Mismatch Calibration Technique for SAR ADCs Based on Deterministic Self-Calibration and Stochastic Quantization Ieee Transactions On Circuits and Systems I-Regular Papers. 67: 2883-2896. DOI: 10.1109/Tcsi.2020.2985816  0.448
2020 Wu Y, Lu P, Staszewski RB. A Time-Domain 147fs rms 2.5 -MHz Bandwidth Two-Step Flash-MASH 1-1-1 Time-to-Digital Converter With Third-Order Noise-Shaping and Mismatch Correction Ieee Transactions On Circuits and Systems. 67: 2532-2545. DOI: 10.1109/Tcsi.2020.2983581  0.451
2020 Esmailiyan A, Schembari F, Staszewski RB. A 0.36-V 5-MS/s Time-Mode Flash ADC With Dickson-Charge-Pump-Based Comparators in 28-nm CMOS Ieee Transactions On Circuits and Systems. 67: 1789-1802. DOI: 10.1109/Tcsi.2020.2969804  0.481
2020 Wang H, Schembari F, Staszewski RB. Passive SC $\Delta\Sigma$ Modulator Based on Pipelined Charge-Sharing Rotation in 28-nm CMOS Ieee Transactions On Circuits and Systems I-Regular Papers. 67: 578-589. DOI: 10.1109/Tcsi.2019.2944467  0.524
2020 Nikandish G, Staszewski RB, Zhu A. Breaking the Bandwidth Limit: A Review of Broadband Doherty Power Amplifier Design for 5G Ieee Microwave Magazine. 21: 57-75. DOI: 10.1109/Mmm.2019.2963607  0.443
2020 Nikandish GR, Staszewski RB, Zhu A. Unbalanced Power Amplifier: An Architecture for Broadband Back-Off Efficiency Enhancement Ieee Journal of Solid-State Circuits. 1-1. DOI: 10.1109/Jssc.2020.3014244  0.424
2020 Hu S, Du J, Chen P, Nguyen HM, Quinlan P, Siriburanon T, Staszewski RB. A Type-II Phase-Tracking Receiver Ieee Journal of Solid-State Circuits. 1-1. DOI: 10.1109/Jssc.2020.3005797  0.438
2020 Xu K, Yin J, Mak P, Staszewski RB, Martins RP. A Single-Pin Antenna Interface RF Front End Using a Single-MOS DCO-PA and a Push–Pull LNA Ieee Journal of Solid-State Circuits. 55: 2055-2068. DOI: 10.1109/Jssc.2020.2991520  0.483
2020 Wang H, Schembari F, Staszewski RB. An Event-Driven Quasi-Level-Crossing Delta Modulator Based on Residue Quantization Ieee Journal of Solid-State Circuits. 55: 298-311. DOI: 10.1109/Jssc.2019.2950175  0.504
2019 Salarpour M, Farzaneh F, Staszewski RB. Synchronization-Phase Alignment of All-Digital Phase-Locked Loop Chips for a 60-GHz MIMO Transmitter and Evaluation of Phase Noise Effects Ieee Transactions On Microwave Theory and Techniques. 67: 3187-3199. DOI: 10.1109/Tmtt.2019.2910060  0.499
2019 Hu Y, Siriburanon T, Staszewski RB. Intuitive Understanding of Flicker Noise Reduction via Narrowing of Conduction Angle in Voltage-Biased Oscillators Ieee Transactions On Circuits and Systems Ii-Express Briefs. 66: 1962-1966. DOI: 10.1109/Tcsii.2019.2896483  0.389
2019 Chen P, Zhang F, Zong Z, Hu S, Siriburanon T, Staszewski RB. A 31- $\mu$ W, 148-fs Step, 9-bit Capacitor-DAC-Based Constant-Slope Digital-to-Time Converter in 28-nm CMOS Ieee Journal of Solid-State Circuits. 54: 3075-3085. DOI: 10.1109/Jssc.2019.2939663  0.517
2019 Kamath U, Cullen E, Yu T, Jennings J, Wu S, Lim P, Farley B, Staszewski RB. A 1-V Bandgap Reference in 7-nm FinFET With a Programmable Temperature Coefficient and Inaccuracy of ±0.2% From −45°C to 125°C Ieee Journal of Solid-State Circuits. 54: 1830-1840. DOI: 10.1109/Jssc.2019.2919134  0.347
2019 Xu K, Kuo F, Chen HR, Cho L, Jou C, Chen M, Staszewski RB. A 0.85mm2 51%-Efficient 11-dBm Compact DCO-DPA in 16-nm FinFET for Sub-Gigahertz IoT TX Using HD2 Self-Suppression and Pulling Mitigation Ieee Journal of Solid-State Circuits. 54: 2028-2037. DOI: 10.1109/Jssc.2019.2906803  0.576
2019 Liu Y, Purushothaman VK, Bachmann C, Staszewski RB. Design and Analysis of a DCO-Based Phase-Tracking RF Receiver for IoT Applications Ieee Journal of Solid-State Circuits. 54: 785-795. DOI: 10.1109/Jssc.2018.2883398  0.562
2019 Zong Z, Chen P, Staszewski RB. A Low-Noise Fractional- ${N}$ Digital Frequency Synthesizer With Implicit Frequency Tripling for mm-Wave Applications Ieee Journal of Solid-State Circuits. 54: 755-767. DOI: 10.1109/Jssc.2018.2883397  0.576
2019 Chen Y, Liu Y, Zong Z, Dijkhuis J, Dolmans G, Staszewski RB, Babaie M. A Supply Pushing Reduction Technique for LC Oscillators Based on Ripple Replication and Cancellation Ieee Journal of Solid-State Circuits. 54: 240-252. DOI: 10.1109/Jssc.2018.2871195  0.496
2019 Nikandish G, Staszewski RB, Zhu A. Bandwidth Enhancement of GaN MMIC Doherty Power Amplifiers Using Broadband Transformer-Based Load Modulation Network Ieee Access. 7: 119844-119855. DOI: 10.1109/Access.2019.2937388  0.461
2019 Nikandish G, Staszewski RB, Zhu A. Design of Highly Linear Broadband Continuous Mode GaN MMIC Power Amplifiers for 5G Ieee Access. 7: 57138-57150. DOI: 10.1109/Access.2019.2914563  0.448
2019 Hedayati MK, Abdipour A, Shirazi RS, Ammann MJ, John M, Cetintepe C, Staszewski RB. Challenges in On-Chip Antenna Design and Integration with RF Receiver Front-End Circuitry in Nanoscale CMOS for 5G Communication Systems Ieee Access. 7: 43190-43204. DOI: 10.1109/Access.2019.2905861  0.414
2018 Hedayati MK, Abdipour A, Shirazi RS, Cetintepe C, Staszewski RB. A 33-GHz LNA for 5G Wireless Systems in 28-nm Bulk CMOS Ieee Transactions On Circuits and Systems Ii-Express Briefs. 65: 1460-1464. DOI: 10.1109/Tcsii.2018.2859187  0.454
2018 Chen P, Huang X, Chen Y, Wu L, Staszewski RB. An On-Chip Self-Characterization of a Digital-to-Time Converter by Embedding it in a First-Order $\Delta\Sigma$ Loop Ieee Transactions On Circuits and Systems I-Regular Papers. 65: 3734-3744. DOI: 10.1109/Tcsi.2018.2857999  0.506
2018 Kuo F, Babaie M, Chen HR, Cho L, Jou C, Chen M, Staszewski RB. An All-Digital PLL for Cellular Mobile Phones in 28-nm CMOS with −55 dBc Fractional and −91 dBc Reference Spurs Ieee Transactions On Circuits and Systems I-Regular Papers. 65: 3756-3768. DOI: 10.1109/Tcsi.2018.2855972  0.509
2018 Nikandish G, Staszewski RB, Zhu A. The (R)evolution of Distributed Amplifiers: From Vacuum Tubes to Modern CMOS and GaN ICs Ieee Microwave Magazine. 19: 66-83. DOI: 10.1109/Mmm.2018.2813838  0.37
2018 Li C, Yuan M, Liao C, Lin Y, Chang C, Staszewski RB. All-Digital PLL for Bluetooth Low Energy Using 32.768-kHz Reference Clock and ≤0.45-V Supply Ieee Journal of Solid-State Circuits. 53: 3660-3671. DOI: 10.1109/Jssc.2018.2871632  0.576
2018 Pourmousavian N, Kuo F, Siriburanon T, Babaie M, Staszewski RB. A 0.5-V 1.6-mW 2.4-GHz Fractional-N All-Digital PLL for Bluetooth LE With PVT-Insensitive TDC Using Switched-Capacitor Doubler in 28-nm CMOS Ieee Journal of Solid-State Circuits. 53: 2572-2583. DOI: 10.1109/Jssc.2018.2843337  0.53
2018 Hu Y, Siriburanon T, Staszewski RB. A Low-Flicker-Noise 30-GHz Class-F 23 Oscillator in 28-nm CMOS Using Implicit Resonance and Explicit Common-Mode Return Path Ieee Journal of Solid-State Circuits. 53: 1977-1987. DOI: 10.1109/Jssc.2018.2818681  0.473
2018 Patra B, Incandela RM, Dijk JPGv, Homulle HAR, Song L, Shahmohammadi M, Staszewski RB, Vladimirescu A, Babaie M, Sebastiano F, Charbon E. Cryo-CMOS Circuits and Systems for Quantum Computing Applications Ieee Journal of Solid-State Circuits. 53: 309-321. DOI: 10.1109/Jssc.2017.2737549  0.371
2018 Salarpour M, Farzaneh F, Staszewski RB. A low cost-low loss broadband integration of a CMOS transmitter and its antenna for mm-wave FMCW radar applications Aeu-International Journal of Electronics and Communications. 95: 313-325. DOI: 10.1016/J.Aeue.2018.08.032  0.472
2017 Tohidian M, Madadi I, Staszewski RB. A Fully Integrated Discrete-Time Superheterodyne Receiver Ieee Transactions On Very Large Scale Integration Systems. 25: 635-647. DOI: 10.1109/Tvlsi.2016.2598857  0.541
2017 Ximenes ARR, Vlachogiannakis G, Staszewski RB. An Ultracompact 9.4–14.8-GHz Transformer-Based Fractional-N All-Digital PLL in 40-nm CMOS Ieee Transactions On Microwave Theory and Techniques. 65: 4241-4254. DOI: 10.1109/Tmtt.2017.2687901  0.586
2017 Ferreira SB, Kuo F, Babaie M, Bampi S, Staszewski RB. System Design of a 2.75-mW Discrete-Time Superheterodyne Receiver for Bluetooth Low Energy Ieee Transactions On Microwave Theory and Techniques. 65: 1904-1913. DOI: 10.1109/Tmtt.2017.2668407  0.527
2017 Bashir I, Staszewski RB, Balsara PT. Numerical Model of an Injection-Locked Wideband Frequency Modulator for Polar Transmitters Ieee Transactions On Microwave Theory and Techniques. 65: 1914-1920. DOI: 10.1109/Tmtt.2016.2634537  0.791
2017 Liu Y, Heuvel JVD, Kuramochi T, Busze B, Mateman P, Chillara VK, Wang B, Staszewski RB, Philips K. An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS Ieee Transactions On Circuits and Systems I-Regular Papers. 64: 1094-1105. DOI: 10.1109/Tcsi.2016.2625462  0.584
2017 Shahmohammadi M, Babaie M, Staszewski RB. Tuning Range Extension of a Transformer-Based Oscillator Through Common-Mode Colpitts Resonance Ieee Transactions On Circuits and Systems I-Regular Papers. 64: 836-846. DOI: 10.1109/Tcsi.2016.2625199  0.362
2017 Wu Y, Shahmohammadi M, Chen Y, Lu P, Staszewski RB. A 3.5–6.8-GHz Wide-Bandwidth DTC-Assisted Fractional-N All-Digital PLL With a MASH $\Delta \Sigma $ -TDC for Low In-Band Phase Noise Ieee Journal of Solid-State Circuits. 52: 1885-1903. DOI: 10.1109/Jssc.2017.2682841  0.587
2017 Kuo F, Ferreira SB, Chen HR, Cho L, Jou C, Hsueh F, Madadi I, Tohidian M, Shahmohammadi M, Babaie M, Staszewski RB. A Bluetooth Low-Energy Transceiver With 3.7-mW All-Digital Transmitter, 2.75-mW High-IF Discrete-Time Receiver, and TX/RX Switchable On-Chip Matching Network Ieee Journal of Solid-State Circuits. 52: 1144-1162. DOI: 10.1109/Jssc.2017.2654322  0.531
2016 Ahmadi Mehr SAR, Tohidian M, Staszewski RB. Toward solving multichannel RF-SoC integration issues through digital fractional division Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 24: 1071-1082. DOI: 10.1109/Tvlsi.2015.2436979  0.561
2016 Ahmadi-Mehr SAR, Tohidian M, Staszewski RB. Analysis and Design of a Multi-Core Oscillator for Ultra-Low Phase Noise Ieee Transactions On Circuits and Systems I: Regular Papers. 63: 529-539. DOI: 10.1109/Tcsi.2016.2529218  0.565
2016 Hu Z, De Vreede LCN, Alavi MS, Calvillo-Cortes DA, Staszewski RB, He S. A 5.9 GHz RFDAC-based outphasing power amplifier in 40-nm CMOS with 49.2% efficiency and 22.2 dBm power Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 2016: 206-209. DOI: 10.1109/RFIC.2016.7508287  0.318
2016 Shahmohammadi M, Babaie M, Staszewski RB. A 1/f Noise Upconversion Reduction Technique for Voltage-Biased RF CMOS Oscillators Ieee Journal of Solid-State Circuits. 51: 2610-2624. DOI: 10.1109/Jssc.2016.2602214  0.395
2016 Babaie M, Kuo FW, Chen HNR, Cho LC, Jou CP, Hsueh FL, Shahmohammadi M, Staszewski RB. A Fully Integrated Bluetooth Low-Energy Transmitter in 28 nm CMOS With 36% System Efficiency at 3 dBm Ieee Journal of Solid-State Circuits. 51: 1547-1565. DOI: 10.1109/Jssc.2016.2551738  0.492
2016 Bashir I, Staszewski RB, Balsara PT. A Digitally Controlled Injection-Locked Oscillator with Fine Frequency Resolution Ieee Journal of Solid-State Circuits. DOI: 10.1109/Jssc.2016.2539342  0.8
2016 Zong Z, Babaie M, Staszewski RB. A 60 GHz Frequency Generator Based on a 20 GHz Oscillator and an Implicit Multiplier Ieee Journal of Solid-State Circuits. DOI: 10.1109/Jssc.2016.2528997  0.578
2016 Madadi I, Tohidian M, Cornelissens K, Vandenameele P, Staszewski RB. A High IIP2 SAW-Less Superheterodyne Receiver With Multistage Harmonic Rejection Ieee Journal of Solid-State Circuits. DOI: 10.1109/Jssc.2015.2504414  0.465
2016 Bashir I, Staszewski RB, Eliezer OE, Balsara PT. A Wideband Digital-to-Frequency Converter with Built-In Mechanism for Self-Interference Mitigation Journal of Electronic Testing: Theory and Applications (Jetta). 1-9. DOI: 10.1007/S10836-016-5607-Z  0.849
2015 Zhuang J, Waheed K, Staszewski RB. Design of spur-free Σ\Δ frequency tuning interface for digitally controlled oscillators Ieee Transactions On Circuits and Systems Ii: Express Briefs. 62: 46-50. DOI: 10.1109/Tcsii.2014.2362692  0.543
2015 Madadi I, Tohidian M, Staszewski RB. Analysis and Design of I/Q Charge-Sharing Band-Pass-Filter for Superheterodyne Receivers Ieee Transactions On Circuits and Systems I: Regular Papers. DOI: 10.1109/Tcsi.2015.2437514  0.488
2015 Zong Z, Babaie M, Staszewski RB. A 60 GHz 25% tuning range frequency generator with implicit divider based on third harmonic extraction with 182 dBc/Hz FoM Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 2015: 279-282. DOI: 10.1109/RFIC.2015.7337759  0.462
2015 Babaie M, Staszewski RB, Galatro L, Spirito M. A wideband 60 GHz class-E/F2 power amplifier in 40nm CMOS Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 2015: 215-218. DOI: 10.1109/RFIC.2015.7337743  0.314
2015 Babaie M, Shahmohammadi M, Staszewski RB. A 0.5V 0.5mW switching current source oscillator Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 2015: 183-186. DOI: 10.1109/RFIC.2015.7337735  0.364
2015 Wu Y, Lu P, Staszewski RB. A 103fsrms 1.32mW 50MS/s 1.25MHz bandwidth two-step flash-ΔΣ time-to-digital converter for ADPLL Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 2015: 95-98. DOI: 10.1109/RFIC.2015.7337713  0.418
2015 Tohidian M, Ahmadi-Mehr SAR, Staszewski RB. A Tiny Quadrature Oscillator Using Low-Q Series LC Tanks Ieee Microwave and Wireless Components Letters. 25: 520-522. DOI: 10.1109/LMWC.2015.2440663  0.322
2015 Babaie M, Staszewski RB. An Ultra-Low Phase Noise Class-F 2 CMOS Oscillator With 191 dBc/Hz FoM and Long-Term Reliability Ieee Journal of Solid-State Circuits. DOI: 10.1109/Jssc.2014.2379265  0.468
2015 Chen P, Huang X, Staszewski RB. Fractional spur suppression in all-digital phase-locked loops Proceedings - Ieee International Symposium On Circuits and Systems. 2015: 2565-2568. DOI: 10.1109/ISCAS.2015.7169209  0.383
2015 Wang B, Liu YH, Harpe P, Van Den Heuvel J, Liu B, Gao H, Staszewski RB. A digital to time converter with fully digital calibration scheme for ultra-low power ADPLL in 40 nm CMOS Proceedings - Ieee International Symposium On Circuits and Systems. 2015: 2289-2292. DOI: 10.1109/ISCAS.2015.7169140  0.48
2015 Chen P, Huang X, Liu YH, Ding M, Zhou C, Ba A, Philips K, De Groot H, Staszewski RB. Design and built-in characterization of digital-to-time converters for ultra-low power ADPLLs European Solid-State Circuits Conference. 2015: 283-286. DOI: 10.1109/ESSCIRC.2015.7313882  0.433
2015 Wu W, Staszewski RB, Long JR. Millimeter-Wave Digitally Intensive Frequency Generation in CMOS Millimeter-Wave Digitally Intensive Frequency Generation in Cmos. 1-188.  0.36
2014 Zhuang J, Staszewski RB. All-digital RF phase-locked loops exploiting phase prediction Ipsj Transactions On System Lsi Design Methodology. 7: 2-15. DOI: 10.2197/Ipsjtsldm.7.2  0.567
2014 Luo X, Sun S, Staszewski RB. Tunable bandpass filter with two adjustable transmission poles and compensable coupling Ieee Transactions On Microwave Theory and Techniques. 62: 2003-2013. DOI: 10.1109/Tmtt.2014.2337287  0.464
2014 Alavi MS, Staszewski RB, De Vreede LCN, Long JR. A wideband 2 × 13-bit all-digital I/Q RF-DAC Ieee Transactions On Microwave Theory and Techniques. 62: 732-752. DOI: 10.1109/Tmtt.2014.2307876  0.597
2014 Ba A, Chillara VK, Liu YH, Kato H, Philips K, Staszewski RB. A 2.4GHz class-D power amplifier with conduction angle calibration for -50dBc harmonic emissions Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 239-242. DOI: 10.1109/RFIC.2014.6851708  0.37
2014 Tohidian M, Madadi I, Staszewski RB. Analysis and design of a high-order discrete-time passive IIR low-pass filter Ieee Journal of Solid-State Circuits. 49: 2575-2587. DOI: 10.1109/Jssc.2014.2359656  0.398
2014 Wu W, Staszewski RB, Long JR. A 56.4-to-63.4 GHz multi-rate all-digital fractional-N PLL for FMCW radar applications in 65 nm CMOS Ieee Journal of Solid-State Circuits. 49: 1081-1096. DOI: 10.1109/Jssc.2014.2301764  0.587
2014 Visweswaran A, Staszewski RB, Long JR. A low phase noise oscillator principled on transformer-coupled hard limiting Ieee Journal of Solid-State Circuits. 49: 373-383. DOI: 10.1109/Jssc.2013.2285375  0.512
2014 Chillara VK, Liu YH, Wang B, Ba A, Vidojkovic M, Philips K, De Groot H, Staszewski RB. 9.8 An 860μW 2.1-to-2.7GHz all-digital PLL-based frequency modulator with a DTC-assisted snapshot TDC for WPAN (Bluetooth Smart and ZigBee) applications Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 57: 172-173. DOI: 10.1109/ISSCC.2014.6757387  0.445
2014 Tohidian M, Madadi I, Staszewski RB. 3.8 A fully integrated highly reconfigurable discrete-time superheterodyne receiver Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 57: 72-73. DOI: 10.1109/ISSCC.2014.6757343  0.366
2013 Madadi I, Tohidian M, Staszewski RB. A 65nm CMOS high-IF superheterodyne receiver with a High-Q complex BPF Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 323-326. DOI: 10.1109/RFIC.2013.6569594  0.404
2013 Tohidian M, Reza Ahmadi Mehr SA, Staszewski RB. Dual-core high-swing class-C oscillator with ultra-low phase noise Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 243-246. DOI: 10.1109/RFIC.2013.6569572  0.352
2013 Mehrpoc M, Staszewski RB. A highly selective LNTA capable of large-signal handling for RF receiver front-ends Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 185-188. DOI: 10.1109/RFIC.2013.6569556  0.423
2013 Alavi MS, Voicu G, Staszewski RB, De Vreede LCN, Long JR. A 2×13-bit all-digital I/Q RF-DAC in 65-nm CMOS Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 167-170. DOI: 10.1109/RFIC.2013.6569551  0.304
2013 Babaie M, Visweswaran A, He Z, Staszewski RB. Ultra-low phase noise 7.2-8.7 Ghz clip-and-restore oscillator with 191 dBc/Hz FoM Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 43-46. DOI: 10.1109/RFIC.2013.6569517  0.418
2013 Wu W, Long JR, Staszewski RB. High-resolution millimeter-wave digitally controlled oscillators with reconfigurable passive resonators Ieee Journal of Solid-State Circuits. 48: 2785-2794. DOI: 10.1109/Jssc.2013.2282701  0.496
2013 Babaie M, Staszewski RB. A class-F CMOS oscillator Ieee Journal of Solid-State Circuits. 48: 3120-3133. DOI: 10.1109/Jssc.2013.2273823  0.471
2013 Wu W, Bai X, Staszewski RB, Long JR. A 56.4-to-63.4GHz spurious-free all-digital fractional-N PLL in 65nm CMOS Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 56: 352-353. DOI: 10.1109/ISSCC.2013.6487766  0.314
2013 Babaie M, Staszewski RB. Third-harmonic injection technique applied to a 5.87-to-7.56GHz 65nm CMOS class-F oscillator with 192dBc/Hz FOM Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 56: 348-349. DOI: 10.1109/ISSCC.2013.6487764  0.406
2013 Lai JW, Wang CH, Kao K, Lin A, Cho YH, Cho L, Hung MH, Shih XY, Lin CM, Yan SH, Chung YH, Liang PCP, Dehng GK, Li HS, Chien G, ... Staszewski RB, et al. A 0.27mm2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency class-D DPA in 40nm CMOS Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 56: 342-343. DOI: 10.1109/ISSCC.2013.6487762  0.372
2013 Tohidian M, Madadi I, Staszewski RB. A 2mW 800MS/s 7th-order discrete-time IIR filter with 400kHz-to-30MHz BW and 100dB stop-band rejection in 65nm CMOS Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 56: 174-175. DOI: 10.1109/ISSCC.2013.6487687  0.405
2013 Ahmadi Mehr SAR, Tohidian M, Staszewski RB. Frequency translation through fractional division for a two-channel pulling mitigation European Solid-State Circuits Conference. 241-244. DOI: 10.1109/ESSCIRC.2013.6649117  0.387
2013 Zhuang J, Staszewski RB. Gain estimation of a digital-to-time converter for phase-prediction all-digital PLL 2013 European Conference On Circuit Theory and Design, Ecctd 2013 - Proceedings 0.372
2012 Alavi MS, Staszewski RB, De Vreede LCN, Visweswaran A, Long JR. All-digital RF I/Q modulator Ieee Transactions On Microwave Theory and Techniques. 60: 3513-3526. DOI: 10.1109/Tmtt.2012.2211612  0.56
2012 Visweswaran A, Staszewski RB, Long JR, Akhnoukh A. Fine frequency tuning using injection-control in a 1.2V 65nm CMOS quadrature oscillator Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 293-296. DOI: 10.1109/RFIC.2012.6242284  0.328
2012 Staszewski RB. DL Bogdan Staszewski Presents Seminar on RF at SSCS-Shanghai: Toward a Radio Frequency Computer [People] Ieee Solid-State Circuits Magazine. 4: 45-58. DOI: 10.1109/Mssc.2012.2183191  0.395
2012 Staszewski RB. Digitally intensive wireless transceivers Ieee Design and Test of Computers. 29: 7-18. DOI: 10.1109/Mdt.2012.2209392  0.346
2012 Visweswaran A, Staszewski RB, Long JR. A clip-and-restore technique for phase desensitization in a 1.2V 65nm CMOS oscillator for cellular mobile and base stations Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 55: 350-351. DOI: 10.1109/ISSCC.2012.6177042  0.334
2012 Staszewski RB, Rudell J. Is RF doomed to digitization? What shall RF circuit designers do? Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 55: 510. DOI: 10.1109/ISSCC.2012.6177041  0.342
2012 Jiang W, Tavakol A, Effendrik P, Van De Gevel M, Verwaal F, Staszewski RB. Design of ADPLL system for WiMAX applications in 40-nm CMOS 2012 19th Ieee International Conference On Electronics, Circuits, and Systems, Icecs 2012. 73-76. DOI: 10.1109/ICECS.2012.6463568  0.583
2012 Zhuang J, Staszewski RB. A low-power all-digital PLL architecture based on phase prediction 2012 19th Ieee International Conference On Electronics, Circuits, and Systems, Icecs 2012. 797-800. DOI: 10.1109/ICECS.2012.6463539  0.478
2011 Eliezer O, Staszewski RB. Built-in measurements in low-cost digital-RF transceivers Ieice Transactions On Electronics. 930-937. DOI: 10.1587/Transele.E94.C.930  0.779
2011 Waheed K, Staszewski RB, Dülger F, Ullah MS, Vamvakos SD. Spurious-free time-to-digital conversion in an ADPLL using short dithering sequences Ieee Transactions On Circuits and Systems I: Regular Papers. 58: 2051-2060. DOI: 10.1109/Tcsi.2011.2163981  0.556
2011 Park M, Perrott MH, Staszewski RB. An amplitude resolution improvement of an RF-DAC employing pulsewidth modulation Ieee Transactions On Circuits and Systems I: Regular Papers. 58: 2590-2603. DOI: 10.1109/Tcsi.2011.2143030  0.529
2011 Alavi MS, Staszewski RB, De Vreede LCN, Long JR. Orthogonal summing and power combining network in a 65-nm all-digital RF I/Q modulator 2011 Ieee International Symposium On Radio-Frequency Integration Technology, Rfit 2011. 21-24. DOI: 10.1109/RFIT.2011.6141758  0.366
2011 Staszewski RB. Digital RF and digitally-assisted RF (invited) 2011 Ieee International Symposium On Radio-Frequency Integration Technology, Rfit 2011. 9-16. DOI: 10.1109/RFIT.2011.6141746  0.459
2011 Mehta J, Staszewski RB, Feygin G, Eliezer O, Frechette M, Balsara P. Mismatch considerations in an RF-DAC design for a digital polar EDGE transmitter 2011 Ieee International Symposium On Radio-Frequency Integration Technology, Rfit 2011. 169-172. DOI: 10.1109/RFIT.2011.6141743  0.472
2011 Staszewski RB, Bashir I, Waheed K. Dynamic bandwidth adjustment of an RF all-digital PLL Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. DOI: 10.1109/RFIC.2011.5940658  0.703
2011 Chen W, Staszewski RB. DL R. Bogdan Staszewski Addresses SSCS-Taipei on Fundamentals of Digital RF and Digitally Assisted RF in March [People] Ieee Solid-State Circuits Magazine. 3: 31-33. DOI: 10.1109/Mssc.2011.941604  0.388
2011 Staszewski RB, Waheed K, Dülger F, Eliezer OE. Spur-free multirate all-digital PLL for mobile phones in 65 nm CMOS Ieee Journal of Solid-State Circuits. 46: 2904-2919. DOI: 10.1109/Jssc.2011.2162769  0.85
2011 Bashir I, Staszewski RB, Eliezer O, Banerjee B, Balsara PT. A novel approach for mitigation of RF oscillator pulling in a polar transmitter Ieee Journal of Solid-State Circuits. 46: 403-415. DOI: 10.1109/Jssc.2010.2096110  0.813
2011 Staszewski RB, Waheed K, Vemulapalli S, Dulger F, Wallberg J, Hung CM, Eliezer O. Spur-free all-digital PLL in 65nm for mobile phones Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 52-53. DOI: 10.1109/ISSCC.2011.5746215  0.516
2011 Bashir I, Staszewski RB. Autonomous predistortion calibration of an RF power amplifier Proceedings - Ieee International Symposium On Circuits and Systems. 205-208. DOI: 10.1109/ISCAS.2011.5937537  0.723
2011 Staszewski RB. Digital RF architectures for wireless transceivers (invited) 2011 20th European Conference On Circuit Theory and Design, Ecctd 2011. 429-436. DOI: 10.1109/ECCTD.2011.6043379  0.458
2011 Effendrik P, Jiang W, Van De Gevel M, Verwaal F, Staszewski RB. Time-to-digital converter (TDC) for WiMAX ADPLL in 40-nm CMOS 2011 20th European Conference On Circuit Theory and Design, Ecctd 2011. 365-368. DOI: 10.1109/ECCTD.2011.6043362  0.54
2011 Alavi MS, Visweswaran A, Staszewski RB, De Vreede LCN, Long JR, Akhnoukh A. A 2-GHz digital I/Q modulator in 65-nm CMOS 2011 Proceedings of Technical Papers: Ieee Asian Solid-State Circuits Conference 2011, a-Sscc 2011. 277-280. DOI: 10.1109/ASSCC.2011.6123565  0.458
2010 Park M, Perrott MH, Staszewski RB. A time-domain resolution improvement of an RF-DAC Ieee Transactions On Circuits and Systems Ii: Express Briefs. 57: 517-521. DOI: 10.1109/Tcsii.2010.2048485  0.506
2010 Mehta J, Zoicas V, Eliezer O, Staszewski RB, Rezeq S, Entezari M, Balsara P. An efficient linearization scheme for a digital polar EDGE transmitter Ieee Transactions On Circuits and Systems Ii: Express Briefs. 57: 193-197. DOI: 10.1109/Tcsii.2010.2041811  0.787
2010 Staszewski RB. State-of-the-art and future directions of high-performance all-digital frequency synthesis in nanometer CMOS Iscas 2010 - 2010 Ieee International Symposium On Circuits and Systems: Nano-Bio Circuit Fabrics and Systems. 229-232. DOI: 10.1109/Tcsi.2011.2150890  0.58
2010 Syllaios IL, Balsara PT, Staszewski RB. Recombination of envelope and phase paths in wideband polar transmitters Ieee Transactions On Circuits and Systems I: Regular Papers. 57: 1891-1904. DOI: 10.1109/Tcsi.2009.2039256  0.831
2010 Zhuang J, Waheed K, Staszewski RB. A technique to reduce phase/frequency modulation bandwidth in a polar RF transmitter Ieee Transactions On Circuits and Systems I: Regular Papers. 57: 2196-2207. DOI: 10.1109/Tcsi.2009.2037394  0.519
2010 Staszewski RB, Vemulapalli S, Waheed K. An all-digital offset PLL architecture Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 17-20. DOI: 10.1109/RFIC.2010.5477376  0.513
2010 Bashir I, Staszewski RB, Eliezer O, Waheed K, Zoicas V, Tal N, Mehta J, Lee MC, Balsara PT, Banerjee B. An EDGE transmitter with mitigation of oscillator pulling Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 13-16. DOI: 10.1109/RFIC.2010.5477247  0.804
2010 Staszewski R, Staszewski RB, Jung T, Murphy T, Bashir I, Eliezer O, Muhammad K, Entezari M. Software assisted digital RF processor (DRP) for single-chip GSM radio in 90 nm CMOS Ieee Journal of Solid-State Circuits. 45: 276-288. DOI: 10.1109/Jssc.2009.2036763  0.847
2010 Mehta J, Staszewski RB, Eliezer O, Rezeq S, Waheed K, Entezari M, Feygin G, Vemulapalli S, Zoicas V, Hung CM, Barton N, Bashir I, Maggio K, Frechette M, Lee MC, et al. A 0.8mm2 all-digital SAW-less polar transmitter in 65nm EDGE SoC Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 53: 58-59. DOI: 10.1109/ISSCC.2010.5434050  0.396
2010 Mehta J, Bashir I, Zoicas V, Wang Y, Eliezer O, Waheed K, Entezari M, Larson S, Shrestha D, Rezeq S, Staszewski RB, Balsara P. Self-calibration of a power pre-amplifier in a digital polar transmitter Proceedings of the 2010 Ieee Dallas Circuits and Systems Workshop: Design Automation, Methodologies and Manufacturability, Dcas 2010. DOI: 10.1109/DCAS.2010.5955042  0.41
2010 Waheed K, Staszewski RB. Precise Delay Alignment Between Amplitude and Phase/Frequency Modulation Paths in a Digital Polar Transmitter Multi-Mode/Multi-Band Rf Transceivers For Wireless Communications: Advanced Techniques, Architectures, and Trends. 85-111. DOI: 10.1002/9780470634455.ch4  0.407
2009 Wu W, Long JR, Staszewski RB. A digital ultra-fast acquisition linear frequency modulated PLL for mm-Wave FMCW radars 2009 Ieee International Symposium On Radio-Frequency Integration Technology, Rfit 2009. 32-35. DOI: 10.1109/RFIT.2009.5383695  0.512
2009 Bashir I, Staszewski RB, Eliezer O, Waheed K, Balsara PT. An SoC with automatic bias optimization of an RF oscillator Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 259-262. DOI: 10.1109/RFIC.2009.5135535  0.799
2009 Muhammad K, Hung CM, Leipold D, Mayhugh T, Elahi I, Deng I, Fernando C, Lee MC, Murphy T, Wallberg JL, Staszewski RB, Larson S, Jung T, Cruise P, Roussel V, ... ... Staszewski R, et al. A low-cost quad-band single-chip GSM/GPRS radio in 90nm digital CMOS Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 197-200. DOI: 10.1109/RFIC.2009.5135521  0.845
2009 Eliezer OE, Staszewski RB, Bashir I, Bhatara S, Balsara PT. A phase domain approach for mitigation of self-interference in wireless transceivers Ieee Journal of Solid-State Circuits. 44: 1436-1453. DOI: 10.1109/Jssc.2009.2014941  0.848
2009 Tangudu J, Gunturi S, Jalan S, Janardhanan J, Ganesan R, Sahu D, Waheed K, Wallberg J, Staszewski RB. Quantization noise improvement of time to digital converter (TDC) for ADPLL Proceedings - Ieee International Symposium On Circuits and Systems. 1020-1023. DOI: 10.1109/ISCAS.2009.5117932  0.435
2009 Staszewski RB, Waheed K, Vemulapalli S, Vallur P, Entezari M, Eliezer O. Elimination of spurious noise due to time-to-digital converter Proceedings of the 2009 Ieee Dallas Circuits and Systems Workshop: Energy Efficient Circuits and Systems, Dcas-2009. 67-70. DOI: 10.1109/DCAS.2009.5505727  0.459
2009 Eliezer OE, Staszewski RB, Balsara PT. A methodological approach for the minimization of self-interference effects in highly integrated transceiver SoCs 2009 Ieee International Conference On Microwaves, Communications, Antennas and Electronics Systems, Comcas 2009. DOI: 10.1109/COMCAS.2009.5385949  0.811
2008 Syllaios IL, Staszewski RB, Balsara PT. Time-domain modeling of an RF all-digital PLL Ieee Transactions On Circuits and Systems Ii: Express Briefs. 55: 601-605. DOI: 10.1109/Tcsii.2007.916845  0.799
2008 Staszewski RB, Leipold D, Eliezer O, Entezari M, Muhammad K, Bashir I, Hung CM, Wallberg J, Staszewski R, Cruise P, Rezeq S, Vemulapalli S, Waheed K, Barton N, Lee MC, et al. A 24mm2 quad-band single-chip GSM radio with transmitter calibration in 90nm digital CMOS Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 51. DOI: 10.1109/ISSCC.2008.4523130  0.812
2008 Waheed K, Staszewski RB, Rezeq S. Curse of digital polar transmission: Precise delay alignment in amplitude and phase modulation paths Proceedings - Ieee International Symposium On Circuits and Systems. 3142-3145. DOI: 10.1109/ISCAS.2008.4542124  0.417
2008 Waheed K, Staszewski RB. Mitigation of CMOS device variability in the transmitter amplitude path using digital RF processing Proceedings - Ieee International Symposium On Circuits and Systems. 568-571. DOI: 10.1109/ISCAS.2008.4541481  0.526
2008 Syllaios IL, Balsara PT, Staszewski RB. Envelope and phase path recombination in ADPLL-based wideband polar transmitters Proceedings of the 2008 Ieee Dallas Circuits and Systems Workshop On System-On-Chip, Soc: Design, Applications, Integration, and Software, Dcas 2008. DOI: 10.1109/DCAS.2008.4695931  0.834
2008 Lopez J, Lie DYC, Staszewski RB, Huang D, Hung CM, Swaminathan S. On the portability and performance of fully monolithic transformer structures for RF power amplfiers in standard CMOS process Proceedings of the 2008 Ieee Dallas Circuits and Systems Workshop On System-On-Chip, Soc: Design, Applications, Integration, and Software, Dcas 2008. DOI: 10.1109/DCAS.2008.4695929  0.312
2007 Staszewski RB, Balsara PT. All-digital PLL with ultra fast settling Ieee Transactions On Circuits and Systems Ii: Express Briefs. 54: 181-185. DOI: 10.1109/Tcsii.2006.886896  0.795
2007 Staszewski RB, Bashir I, Eliezer O. RF built-in self test of a wireless transmitter Ieee Transactions On Circuits and Systems Ii: Express Briefs. 54: 186-190. DOI: 10.1109/Tcsii.2006.886202  0.834
2007 Eliezer O, Bashir I, Staszewski RB, Balsara PT. Built-in self testing of a DRP-based GSM transmitter Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 339-342. DOI: 10.1109/RFIC.2007.380896  0.742
2007 Akhtar S, Litmanen P, Ipek M, Lin J, Pennisi S, Huang FJ, Staszewski RB. Analog path for triple band WCDMA polar modulated transmitter in 90nm CMOS Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 185-188. DOI: 10.1109/RFIC.2007.380861  0.467
2007 Syllaios IL, Balsara PT, Staszewski RB. On the reconfigurability of all-digital phase-locked loops for software defined radios Ieee International Symposium On Personal, Indoor and Mobile Radio Communications, Pimrc. DOI: 10.1109/PIMRC.2007.4394091  0.859
2007 Muhammad K, Murphy T, Staszewski RB. Verification of digital RF processors: RF, analog, baseband, and software Ieee Journal of Solid-State Circuits. 42: 992-1001. DOI: 10.1109/Jssc.2007.894327  0.561
2007 Staszewski R, Jung T, Staszewski RB, Leipold D, Murphy T. Software aspects of the Digital RF Processor (DRP™) Proceedings 2007 Ieee International Conference On Integrated Circuit Design and Technology, Icicdt. 147-149. DOI: 10.1109/ICICDT.2007.4299560  0.46
2007 Atalla E, Bashir I, Balsara P, Kiasaleh K, Staszewski RB. A practical step forward toward software-defined radio transmitters 2007 Ieee Dallas/Cas Workshop On System-On-Chip (Soc): Design, Applications, Integration, and Software, Dcas-07. 63-66. DOI: 10.1109/DCAS.2007.4433217  0.688
2007 Syllaios IL, Balsara PT, Staszewski RB. Time-Domain Modeling of a Phase-Domain All-Digital Phase-Locked Loop for RF Applications Proceedings of the Ieee 2007 Custom Integrated Circuits Conference, Cicc 2007. 861-864. DOI: 10.1109/CICC.2007.4405864  0.837
2007 Waheed K, Staszewski RB. Digital RF processing techniques for device mismatch tolerant transmitters in nanometer-scale CMOS Proceedings - Ieee International Symposium On Circuits and Systems. 1253-1256.  0.458
2007 Waheed K, Staszewski RB, Wallberg J. Injection spurs due to reference frequency retiming by a channel dependent clock at the ADPLL RF output and its mitigation Proceedings - Ieee International Symposium On Circuits and Systems. 3291-3294.  0.379
2006 Iniewski K, El-Gamal M, Staszewski RB. Editorial: CMOS RF circuits for wireless applications Eurasip Journal On Wireless Communications and Networking. 2006. DOI: 10.1155/Wcn/2006/86753  0.444
2006 Koh J, Gomez G, Muhammad K, Staszewski RB, Haroun B. A sigma-delta ADC with decimation and gain control function for a bluetooth receiver in 130 nm digital CMOS Eurasip Journal On Wireless Communications and Networking. 2006. DOI: 10.1155/WCN/2006/71249  0.44
2006 Ho YC, Staszewski RB, Muhammad K, Hung CM, Leipold D, Maggio K. Charge-domain signal processing of direct RF sampling mixer with discrete-time filters in bluetooth and GSM receivers Eurasip Journal On Wireless Communications and Networking. 2006. DOI: 10.1155/Wcn/2006/62905  0.6
2006 Staszewski RB, Vemulapalli S, Vallur P, Wallberg J, Balsara PT. 1.3 V 20 ps time-to-digital converter for frequency synthesis in 90-nm CMOS Ieee Transactions On Circuits and Systems Ii: Express Briefs. 53: 220-224. DOI: 10.1109/Tcsii.2005.858754  0.773
2006 Staszewski RB, Wallberg J, Hung CM, Feygin G, Entezari M, Leipold D. LMS-based calibration of an RF digitally controlled oscillator for mobile phones Ieee Transactions On Circuits and Systems Ii: Express Briefs. 53: 225-229. DOI: 10.1109/Tcsii.2005.858750  0.618
2006 Muhammad K, Ho YC, Mayhugh TL, Hung CM, Jung T, Elahi I, Lin C, Deng I, Fernando C, Wallberg JL, Vemulapalli SK, Larson S, Murphy T, Leipold D, Cruise P, ... ... Staszewski RB, ... ... Staszewski R, et al. The first fully integrated quad-band GSM/GPRS receiver in a 90-nm digital CMOS process Ieee Journal of Solid-State Circuits. 41: 1772-1781. DOI: 10.1109/Jssc.2006.877271  0.828
2006 Hung CM, Staszewski RB, Barton N, Lee MC, Leipold D. A digitally controlled oscillator system for SAW-less transmitters in cellular handsets Ieee Journal of Solid-State Circuits. 41: 1160-1169. DOI: 10.1109/JSSC.2006.872739  0.536
2006 Staszewski RB, Wallberg J, Balsara PT. All-digital PLL with variable loop type characteristics 2006 Ieee Dallas/Cas Workshop Ondesign, Applications, Integration and Software, Dcas-06. 115-118. DOI: 10.1109/DCAS.2006.321047  0.756
2006 Bashir I, Staszewski RB, Eliezer O. Tuning word retiming of a digitally-controlled oscillator using RF built-in self test 2006 Ieee Dallas/Cas Workshop Ondesign, Applications, Integration and Software, Dcas-06. 103-106. DOI: 10.1109/DCAS.2006.321044  0.734
2006 Vamvakos SD, Staszewski RB, Sheba M, Waheed K. Noise analysis of time-to-digital converter in all-digital PLLs 2006 Ieee Dallas/Cas Workshop Ondesign, Applications, Integration and Software, Dcas-06. 87-90. DOI: 10.1109/DCAS.2006.321040  0.4
2006 Eliezer O, Friedman O, Staszewski RB. A built-in tester for modulation noise in a wireless transmitter 2006 Ieee Dallas/Cas Workshop Ondesign, Applications, Integration and Software, Dcas-06. 59-62. DOI: 10.1109/DCAS.2006.321033  0.458
2006 Staszewski RB, Muhammad K, Leipold D. Digital RF processor techniques for single-chip radios (invited) Proceedings of the Custom Integrated Circuits Conference. 789-796. DOI: 10.1109/CICC.2006.320998  0.51
2006 Staszewski R, Jung T, Staszewski RB, Muhammad K, Leipold D, Murphy T, Sabin S, Wallberg J, Larson S, Entezari M, Fresquez J, Dondershine S, Syed S. Software assisted digital RF processor for single-chip GSM radio in 90 nm CMOS Proceedings of the Custom Integrated Circuits Conference. 81-84. DOI: 10.1109/CICC.2006.320981  0.481
2006 Staszewski RB, Muhammad K, Leipold D. Digital signal processing for RF at 45-nm CMOS and beyond Proceedings of the Custom Integrated Circuits Conference. 517-522. DOI: 10.1109/CICC.2006.320904  0.47
2006 Akhtar S, Ipek M, Lin J, Staszewski RB, Litmanen P. Quad band digitally controlled oscillator for WCDMA transmitter in 90nm CMOS Proceedings of the Custom Integrated Circuits Conference. 129-132. DOI: 10.1109/CICC.2006.320849  0.518
2006 Staszewski RB, Shriki G, Balsara PT. All-digital PLL with ultra fast acquisition 2005 Ieee Asian Solid-State Circuits Conference, Asscc 2005. 289-292. DOI: 10.1109/ASSCC.2005.251722  0.775
2006 Krenik W, Staszewski RB. Fully-integrated CMOS RF transceivers Asia-Pacific Microwave Conference Proceedings, Apmc. 3: 1795-1800. DOI: 10.1109/APMC.2006.4429758  0.322
2006 Muhammad K, Murphy T, Staszewski RB. Verification of RF SoCs: RF, analog, baseband and software Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 2006: 361-364.  0.46
2005 Staszewski RB, Staszewski R, Wallberg JL, Jung T, Hung CM, Koh J, Leipold D, Maggio K, Balsara PT. SoC with an integrated DSP and a 2.4-GHz RF transmitter Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 13: 1253-1264. DOI: 10.1109/Tvlsi.2005.859587  0.775
2005 Staszewski RB, Leipold D, Balsara PT. Direct frequency modulation of an ADPLL for Bluetooth/GSM with injection pulling elimination Ieee Transactions On Circuits and Systems Ii: Express Briefs. 52: 339-343. DOI: 10.1109/Tcsii.2005.848957  0.728
2005 Staszewski RB, Balsara PT. Phase-domain all-digital phase-locked loop Ieee Transactions On Circuits and Systems Ii: Express Briefs. 52: 159-163. DOI: 10.1109/Tcsii.2004.842067  0.782
2005 Staszewski RB, Fernando C, Balsara PT. Event-driven simulation and modeling of phase noise of an RF oscillator Ieee Transactions On Circuits and Systems I: Regular Papers. 52: 723-733. DOI: 10.1109/Tcsi.2005.844236  0.684
2005 Staszewski RB, Vemulapalli S, Vallur P, Wallberg J, Balsara PT. Time-to-digital converter for RF frequency synthesis in 90 nm CMOS Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 473-476. DOI: 10.1109/RFIC.2005.1489847  0.742
2005 Waheed K, Staszewski RB. Time-domain behavioral modeling of a multi-gigahertz digital RF oscillator using VHDL Midwest Symposium On Circuits and Systems. 2005: 1669-1672. DOI: 10.1109/MWSCAS.2005.1594439  0.457
2005 Waheed K, Staszewski RB. Harmonic characterization of mismatches in deep sub-micron varactors for a digitally controlled RF oscillator Midwest Symposium On Circuits and Systems. 2005: 951-954. DOI: 10.1109/MWSCAS.2005.1594260  0.552
2005 Muhammad K, Staszewski RB, Leipold D. Digital RF processing: Toward low-cost reconfigurable radios Ieee Communications Magazine. 43: 105-113. DOI: 10.1109/Mcom.2005.1497564  0.57
2005 Staszewski RB, Wallberg JL, Rezeq S, Hung CM, Eliezer OE, Vemulapalli SK, Fernando C, Maggio K, Staszewski R, Barton N, Lee MC, Cruise P, Entezari M, Muhammad K, Leipold D. All-digital PLL and transmitter for mobile phones Ieee Journal of Solid-State Circuits. 40: 2469-2480. DOI: 10.1109/Jssc.2005.857417  0.861
2005 Staszewski RB, Hung CM, Barton N, Lee MC, Leipold D. A digitally controlled oscillator in a 90 nm digital CMOS process for mobile phones Ieee Journal of Solid-State Circuits. 40: 2203-2211. DOI: 10.1109/Jssc.2005.857359  0.573
2005 Staszewski RB, Rezeq S, Hung CM, Cruise P, Wallberg J. Sigma-delta noise shaping for digital-to-frequency and digital-to-RF-amplitude conversion Proceedings - Fifth International Workshop On System-On-Chip For Real-Time Applications, Iwsoc 2005. 2005: 154-159. DOI: 10.1109/IWSOC.2005.97  0.559
2005 Staszewski RB, Muhammad K, Leipold D. Digital RF processing techniques for SoC radios (Invited) Proceedings - Fifth International Workshop On System-On-Chip For Real-Time Applications, Iwsoc 2005. 2005: 217-222. DOI: 10.1109/IWSOC.2005.54  0.597
2005 Staszewski RB, Staszewski R, Balsara PT. VHDL simulation and modeling of an all-digital RF transmitter Proceedings - Fifth International Workshop On System-On-Chip For Real-Time Applications, Iwsoc 2005. 2005: 233-238. DOI: 10.1109/IWSOC.2005.112  0.637
2005 Staszewski RB, Muhammad K, Leipold D. Digital RF processor (DRP™) for cellular phones Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 2005: 122-129. DOI: 10.1109/ICCAD.2005.1560051  0.504
2005 Muhammad K, Ho YC, Mayhugh T, Hung CM, Jung T, Elahi I, Lin C, Deng I, Fernando C, Wallberg J, Vemulapalli S, Larson S, Murphy T, Leipold D, Cruise P, ... ... Staszewski RB, ... ... Staszewski R, et al. A discrete time quad-band GSM/GPRS receiver in a 90nm digital CMOS process Proceedings of the Custom Integrated Circuits Conference. 2005: 804-807. DOI: 10.1109/CICC.2005.1568792  0.806
2005 Waheed K, Staszewski RB. Characterization of deep-submicron varactor mismatches in a digitally controlled oscillator Proceedings of the Custom Integrated Circuits Conference. 2005: 600-603. DOI: 10.1109/CICC.2005.1568740  0.444
2005 Staszewski RB, Balsara PT. All-Digital Frequency Synthesizer in Deep-Submicron CMOS All-Digital Frequency Synthesizer in Deep-Submicron Cmos. 1-261. DOI: 10.1002/0470041951  0.712
2005 Staszewski RB, Staszewski R. Interpolative pulse-shape filtering for a GSM/Bluetooth transmitter Proceedings of the 2005 Ieee Dallas/Cas Workshop: Architecture, Circuits and Implementation of Socs, Dcas '05. 2005: 191-194.  0.394
2005 Staszewski RB, Muhammad K, Leipold D. Digital RF processor (DRP™) for cellular radios 23rd Norchip Conference 2005. 2005.  0.505
2005 Bashir I, Staszewski RB, Eliezer O, De-Obaldia E. Built-in Self Testing (BIST) of RF performance in a System-on-Chip (SoC) Proceedings of the 2005 Ieee Dallas/Cas Workshop: Architecture, Circuits and Implementation of Socs, Dcas '05. 2005: 215-218.  0.656
2005 Hung CM, Barton N, Staszewski RB, Lee MC, Leipold D. A first RF digitally-controlled oscillator for SAW-less TX in cellular systems Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. 2005: 402-405.  0.493
2005 Staszewski RB, Hung CM, Barton N, Lee MC, Leipold D. A first RF digitally-controlled oscillator for mobile phones Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 119-122.  0.506
2005 Cruise P, Hung CM, Staszewski RB, Eliezer O, Rezeq S, Maggio K, Leipold D. A digital-to-RF-amplitude converter for GSM/GPRS/EDGE in 90-nm digital CMOS Digest of Papers - Ieee Radio Frequency Integrated Circuits Symposium. 21-24.  0.449
2005 Parikh VK, Feygin G, Balsara PT, Rezeq S, Staszewski RB, Vemulapalli S, Eliezer O. Implementation of a high speed digital band-pass sigma-delta modulator for a wireless transmitter Proceedings of the 2005 Ieee Dallas/Cas Workshop: Architecture, Circuits and Implementation of Socs, Dcas '05. 2005: 207-210.  0.739
2005 Ho YC, Muhammad K, Lee MC, Hung CM, Wallberg J, Fernando C, Cruise P, Staszewski RB, Leipold D, Maggio K. A GSM/GPRS receiver front-end with discrete-time filters in a 90nm digital CMOS Proceedings of the 2005 Ieee Dallas/Cas Workshop: Architecture, Circuits and Implementation of Socs, Dcas '05. 2005: 199-202.  0.435
2005 Staszewski RB, Wallberg J, Rezeq S, Hung CM, Eliezer O, Vemulapalli S, Fernando C, Maggio K, Staszewski R, Barton N, Lee MC, Cruise P, Entezari M, Muhammad K, Leipold D. All-digital PLL and GSM/EDGE transmitter in 90nm CMOS Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 48.  0.342
2004 Staszewski RB, Muhammad K, Leipold D, Hung CM, Ho YC, Wallberg JL, Fernando C, Maggio K, Staszewski R, Jung T, Koh J, John S, Deng IY, Sarda V, Moreira-Tamayo O, et al. All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS Ieee Journal of Solid-State Circuits. 39: 2278-2291. DOI: 10.1109/Jssc.2004.836345  0.872
2004 Muhammad K, Staszewski RB. Direct RF sampling mixer with recursive filtering in charge domain Proceedings - Ieee International Symposium On Circuits and Systems. 1.  0.317
2004 Staszewski RB, Wallberg J, Koh J, Balsara PT. High-speed digital circuits for a 2.4 GHZ all-digital RF frequency synthesizer in 130 NM CMOS Proceedings of the 2004 Ieee Dallas/Cas Workshop: Implementation of High Performance Circuits. Dcas-04. 167-170.  0.711
2004 Staszewski RB, Leipold D, Hung CM, Balsara PT. TDC-based frequency synthesizer for wireless applications Ieee Radio Frequency Integrated Circuits Symposium, Rfic, Digest of Technical Papers. 215-218.  0.743
2004 Muhammad K, Staszewski RB, Hung CM. Joint common mode voltage and differential offset voltage control scheme in a low-IF receiver Ieee Radio Frequency Integrated Circuits Symposium, Rfic, Digest of Technical Papers. 405-408.  0.354
2004 Staszewski RB, Fernando C, Balsara PT. Event-driven simulation and modeling of AN RF oscillator Proceedings - Ieee International Symposium On Circuits and Systems. 4.  0.637
2004 Staszewski RB, Hung CM, Maggio K, Wallberg J, Leipold D, Balsara PT. All-digital phase-domain TX frequency synthesizer for Bluetooth radios in 0.13μm CMOS Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 47.  0.731
2004 Staszewski RB, Staszewski R, Wallberg J, Jung T, Hung CM, Leipold D, Maggio K, Balsara PT. DSP-coupled 2.4 GHZ RF transmitter in 130 NM CMOS Proceedings of the 2004 Ieee Dallas/Cas Workshop: Implementation of High Performance Circuits. Dcas-04. 163-166.  0.752
2003 Staszewski RB, Leipold D, Muhammad K, Balsara PT. Digitally Controlled Oscillator (DCO)-Based Architecture for RF Frequency Synthesis in a Deep-Submicrometer CMOS Process Ieee Transactions On Circuits and Systems Ii: Analog and Digital Signal Processing. 50: 815-828. DOI: 10.1109/Tcsii.2003.819128  0.787
2003 Staszewski RB, Leipold D, Balsara PT. Just-In-Time Gain Estimation of an RF Digitally-Controlled Oscillator for Digital Direct Frequency Modulation Ieee Transactions On Circuits and Systems Ii: Analog and Digital Signal Processing. 50: 887-892. DOI: 10.1109/Tcsii.2003.819126  0.754
2003 Staszewski RB, Leipold D, Hung CM, Balsara PT. A first digitally-controlled oscillator in a deep-submicron CMOS process for multi-GHz wireless applications Ieee Radio Frequency Integrated Circuits Symposium, Rfic, Digest of Technical Papers. 81-84.  0.766
2001 Muhammad K, Staszewski RB, Balsara PT. Speed, power, area, and latency tradeoffs in adaptive FIR filtering for PRML read channels Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 9: 42-51. DOI: 10.1109/92.920818  0.659
2001 Muhammad K, Staszewski RB, Balsara PT. Challenges in integrated CMOS transceivers for short distance wireless Proceedings of the Ieee Great Lakes Symposium On Vlsi. 45-50.  0.649
2000 Staszewski RB, Muhammad K, Balsara PT. A constrained asymmetry LMS algorithm for PRML disk drive read channels Conference Record of the Asilomar Conference On Signals, Systems and Computers. 1: 433-437. DOI: 10.1109/82.959872  0.6
2000 Staszewski RB, Muhammad K, Balsara P. 550-MSample/s 8-tap FIR digital filter for magnetic recording read channels Ieee Journal of Solid-State Circuits. 35: 1205-1210. DOI: 10.1109/4.859511  0.301
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