Year |
Citation |
Score |
2018 |
Dehghanian P, Aslan S, Dehghanian P. Maintaining Electric System Safety Through An Enhanced Network Resilience Ieee Transactions On Industry Applications. 54: 4927-4937. DOI: 10.1109/Tia.2018.2828389 |
0.317 |
|
2017 |
Salamy HA, Aslan S. Pipelined-Scheduling of Multiple Embedded Applications on a Multi-Processor-SoC Journal of Circuits, Systems, and Computers. 26: 1750042. DOI: 10.1142/S0218126617500426 |
0.398 |
|
2016 |
Aslan S, Saniie J. Matrix Operations Design Tool for FPGA and VLSI Systems Circuits and Systems. 7: 43-50. DOI: 10.4236/Cs.2016.72005 |
0.7 |
|
2016 |
Aslan S, Mohammad E, Salamy AH. Open Source Synthesis and Verification Tool for Fixed-to-Floating and Floating-to-Fixed Points Conversions Circuits and Systems. 7: 3874-3885. DOI: 10.4236/Cs.2016.711323 |
0.486 |
|
2015 |
Salamy H, Aslan S. A genetic algorithm based approach to pipelined memory-aware scheduling on an MPSoC 2015 Ieee Dallas Circuits and Systems Conference: Enabling Technologies For a Connected World, Dcas 2015. DOI: 10.1109/DCAS.2015.7356603 |
0.338 |
|
2013 |
Saniie J, Oruklu E, Gilliland S, Aslan S. Reconfigurable ultrasonic smart sensor platform for nondestructive evaluation and imaging applications Smart Sensors and Mems: Intelligent Devices and Microsystems For Industrial Applications. 205-229. DOI: 10.1533/9780857099297.1.205 |
0.712 |
|
2013 |
Aslan S, Salamy H, Saniie J. A high-level synthesis and verification tool for application specific kth Root Processing Engine Midwest Symposium On Circuits and Systems. 1051-1054. DOI: 10.1109/MWSCAS.2013.6674833 |
0.645 |
|
2013 |
Niu S, Wang S, Aslan S, Saniie J. Hardware and software design for QR Decomposition Recursive Least Square algorithm Midwest Symposium On Circuits and Systems. 117-120. DOI: 10.1109/MWSCAS.2013.6674599 |
0.641 |
|
2013 |
Niu S, Aslan S, Saniie J. FPGA based architectures for high performance adaptive FIR filter systems Conference Record - Ieee Instrumentation and Measurement Technology Conference. 1662-1665. DOI: 10.1109/I2MTC.2013.6555696 |
0.618 |
|
2012 |
Oruklu E, Hanley R, Aslan S, Desmouliers C, Vallina FM, Saniie J. System-on-Chip Design Using High-Level Synthesis Tools Circuits and Systems. 3: 1-9. DOI: 10.4236/Cs.2012.31001 |
0.724 |
|
2012 |
Aslan S, Oruklu E, Saniie J. A high-level synthesis and verification tool for fixed to floating point conversion Midwest Symposium On Circuits and Systems. 908-911. DOI: 10.1109/MWSCAS.2012.6292168 |
0.702 |
|
2012 |
Gilliland S, Saniie J, Aslan S. Linux based reconfigurable platform for high speed ultrasonic imaging Midwest Symposium On Circuits and Systems. 486-489. DOI: 10.1109/MWSCAS.2012.6292063 |
0.667 |
|
2012 |
Aslan S, Niu S, Saniie J. FPGA implementation of fast QR decomposition based on givens rotation Midwest Symposium On Circuits and Systems. 470-473. DOI: 10.1109/MWSCAS.2012.6292059 |
0.628 |
|
2012 |
Desmouliers C, Oruklu E, Aslan S, Saniie J, Vallina FM. Image and video processing platform for field programmable gate arrays using a high-level synthesis Iet Computers and Digital Techniques. 6: 414-425. DOI: 10.1049/Iet-Cdt.2011.0156 |
0.7 |
|
2011 |
Aslan S, Oruklu E, Saniie J. Architectural design tool for low area band matrix LU factorization Ieee International Conference On Electro Information Technology. DOI: 10.1109/EIT.2011.5978620 |
0.716 |
|
2010 |
Aslan S, Desmouliers C, Oruklu E, Saniie J. An efficient hardware design tool for scalable matrix multiplication Midwest Symposium On Circuits and Systems. 1262-1265. DOI: 10.1109/MWSCAS.2010.5548764 |
0.729 |
|
2010 |
Aslan S, Desmouliers C, Oruklu E, Saniie J. High performance reconfigurable pipelined matrix multiplication module designer 2010 Ieee International Conference On Electro/Information Technology, Eit2010. DOI: 10.1109/EIT.2010.5612172 |
0.71 |
|
2009 |
Oruklu E, Aslan S, Saniie J. Applications of time-frequency distributions for ultrasonic flaw detection Proceedings - Ieee Ultrasonics Symposium. DOI: 10.1109/ULTSYM.2009.5441911 |
0.616 |
|
2009 |
Aslan S, Oruklu E, Saniie J. Realization of area efficient QR factorization using unified division, square root, and inverse square root hardware Proceedings of 2009 Ieee International Conference On Electro/Information Technology, Eit 2009. 245-250. DOI: 10.1109/EIT.2009.5189620 |
0.716 |
|
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