Year |
Citation |
Score |
2014 |
Murphy M, Marathe J, Bharambe G, Lee S, Grover V. Separate compilation in a language-integrated heterogeneous environment Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 8664: 121-135. DOI: 10.1007/978-3-319-09967-5_7 |
0.381 |
|
2012 |
Chakrabarti G, Grover V, Aarts B, Kong X, Kudlur M, Lin Y, Marathe J, Murphy M, Wang JZ. CUDA: Compiling and optimizing for a GPU platform Procedia Computer Science. 9: 1910-1919. DOI: 10.1016/j.procs.2012.04.209 |
0.357 |
|
2010 |
Stratton JA, Grover V, Marathe J, Aarts B, Murphy M, Hu Z, Hwu WMW. Efficient compilation of fine-grained SPMD-threaded programs for multicore CPUs Proceedings of the 2010 Cgo - the 8th International Symposium On Code Generation and Optimization. 111-119. DOI: 10.1145/1772954.1772971 |
0.313 |
|
2010 |
Marathe J, Thakkar V, Mueller F. Feedback-directed page placement for ccNUMA via hardware-generated memory traces Journal of Parallel and Distributed Computing. 70: 1204-1219. DOI: 10.1016/J.Jpdc.2010.08.015 |
0.664 |
|
2008 |
Marathe J, Mueller F. PFetch: Software prefetching exploiting temporal predictability of memory access streams Parallel Architectures and Compilation Techniques - Conference Proceedings, Pact. 310: 1-8. DOI: 10.1145/1509084.1509085 |
0.605 |
|
2007 |
Marathe J, Mueller F, Mohan T, McKee SA, De Supinski BR, Yoo A. METRIC: Memory tracing via dynamic binary rewriting to identify cache inefficiencies Acm Transactions On Programming Languages and Systems. 29. DOI: 10.1145/1216374.1216380 |
0.666 |
|
2007 |
Marathe J, Mueller F. Source-code-correlated cache coherence characterization of OpenMP benchmarks Ieee Transactions On Parallel and Distributed Systems. 18: 818-834. DOI: 10.1109/Tpds.2007.1058 |
0.594 |
|
2006 |
Noeth M, Marathe J, Mueller F, Schulz M, De Supinski B. Scalable compression and replay of communication traces in massively parallel environments Proceedings of the 2006 Acm/Ieee Conference On Supercomputing, Sc'06. DOI: 10.1145/1188455.1188605 |
0.491 |
|
2006 |
Marathe J, Mueller F, Supinski BRd. Analysis of cache-coherence bottlenecks with hybrid hardware/software techniques Acm Transactions On Architecture and Code Optimization. 3: 390-423. DOI: 10.1145/1187976.1187978 |
0.611 |
|
2006 |
Marathe J, Mueller F. Hardware profile-guided automatic page placement for ccNUMA systems Proceedings of the Acm Sigplan Symposium On Principles and Practice of Parallel Programming, Ppopp. 2006: 90-99. |
0.59 |
|
2005 |
Marathe J, Mueller F, De Supinski B. A hybrid hardware/software approach to efficiently determine cache coherence bottlenecks Proceedings of the International Conference On Supercomputing. 21-30. DOI: 10.1145/1088149.1088153 |
0.669 |
|
2004 |
Marathe J, Nagarajan A, Mueller F. Detailed cache coherence characterization for openMP benchmarks Proceedings of the International Conference On Supercomputing. 287-297. |
0.593 |
|
2003 |
Marathe J, Mueller F, Mohan T, De Supinski BR, McKee SA, Yoo A. METRIC: Tracking down inefficiencies in the memory hierarchy via binary rewriting International Symposium On Code Generation and Optimization, Cgo 2003. 289-300. DOI: 10.1109/CGO.2003.1191553 |
0.649 |
|
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