1975 — 1977 |
Pratt, George [⬀] Fonstad, Clifton |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
Fabrication of Heat Mirrors For Solar Energy Applications @ Massachusetts Institute of Technology |
0.915 |
1976 — 1979 |
Fonstad, Clifton |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
Heterostructure Near-Infrared Detectors, Light Emitters and Photocathodes @ Massachusetts Institute of Technology |
0.915 |
1976 — 1979 |
Pratt, George [⬀] Fonstad, Clifton |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
Physics and Technology of Lead-Tin Salt Heterostructure Diode Lasers @ Massachusetts Institute of Technology |
0.915 |
1979 — 1982 |
Fonstad, Clifton |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
Quaternary Heterojunction Phototransistors At 1.3 Microns @ Massachusetts Institute of Technology |
0.915 |
1980 — 1987 |
Fonstad, Clifton Haus, Hermann [⬀] |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
Devices For High-Rate Optical Communications @ Massachusetts Institute of Technology |
0.915 |
1984 — 1988 |
Fonstad, Clifton |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
Industry/Universtiy Cooperative Research Activity: Phase Equilibria and Lpe Growth of Pb-Sn-Te-SE Near the Pbse Binary Corner @ Massachusetts Institute of Technology |
0.915 |
1985 — 1988 |
Smith, Henry (co-PI) [⬀] Fonstad, Clifton Thompson, Carl (co-PI) [⬀] |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
(Ga,A1)as Optoelectronics On Oxidized Silicon Wafers For High Speed Ic Optical Interconnect @ Massachusetts Institute of Technology
Interconnects are playing an increasingly important role in limiting the speed of high performance integrated circuit chips and systems. This motivation has fostered research to use optical rather than electrical interconnects. The research in progress addresses the fabrication problems posed by efforts to use the standard silicon wafer with a gallium arsenide (GaAs) light emitter incorporated. The approach is experimental and investigates use of indium to aid in matching lattices of different materials.
|
0.915 |
1987 — 1990 |
Fonstad, Clifton Haus, Hermann [⬀] |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
Devices For High-Rate Optical Comunications @ Massachusetts Institute of Technology
It is widely believed that integrated optoelectronic devices of gallium- arsenide semiconductors will dominate high-bit-rate optical communication systems. It is also quite likely that this dominance will extend to high speed computers and processors. This proposal should develop groundwork to answer important questions about the eventual practicality of all-optical devices for the above applications. One objective of the proposed project is to use quantum well structures in novel new device structures in order to provide new planar guided wave optics components for use in high rate data optical signal processing. A second objective will be the development of molecular beam epitaxy (MBE) grown quantum well and heterostructure waveguides devices. The primary contribution of the second objective will be the extension of quantum well based optical communications and signal processing to a longer wavelength region (1.0 to 1.6 micrometer). The PIs are considered to be extremely well qualified to carry out the proposed research and I recommend funding of this project for three years in accordance with the budge submitted with the proposal.
|
0.915 |
1988 — 1990 |
Fonstad, Clifton |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
Integration of Gaalas Heterostructure Optoelectronics On Si Integrated Circuits For High Speed Interfaces and Interconnects @ Massachusetts Institute of Technology
This one-year research effort builds on past advances in the molecular beam epitaxy of GaA1As heterostructures on Si achieved under previous NSF support. It will concentrate on improving the performance of the cw laser diodes on silicon by incorporating compressive strain in the quantum well active regions, improving material quality, and reducing residual "bulk" layer strains. The collaboration with Professor Carl Thompson in the Department of Materials Science and Engineering on the initial stages of nucleation and on the development of improved growth techniques will be continued. Preliminary work on selective area epitaxy will be conducted, and an active collaboration with colleagues in the silicon-oriented MIT Microsystems Technology Laboratory will be established to develop a growth sequence which is compatible with their BICMOS process.
|
0.915 |
1990 — 1992 |
Fonstad, Clifton |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
Engineering Research Equipment Grant: Chamber For Uhv and Cleaning of Iii-V Semiconductors @ Massachusetts Institute of Technology
It is proposed to assemble a flexible ultra- high vacuum (UHV) chamber for in-situ etching and cleaning of III-V heterostructures by a variety of techniques, including a unique damage-free supersonic beam process under development by the principal investigator in collaboration with colleagues in the Department of Chemistry and Chemical Engineering. The chamber, which is to be attached to an existing molecular beam epitaxy system, will be used by the principal investigator and his colleagues in the Department of Electrical Engineering and Computer Science research on high performance electronic, opto-electronic, photonic, and quantum devices and integrated systems. In addition to being designed for etching and cleaning inside the UHV environment, this system is designed to enable researchers to mask, etch, pattern, and/or otherwise process III-V heterostructures outside the growth system; to return them to the UHV growth environment; and to then clean, etch, and prepare their surfaces for further MBE growth. It furthermore includes provision to coat the prepared surfaces with arsenic to protect them from contamination during subsequent transfer and storage within the multi-chamber growth system, as well as during removal from the system.
|
0.915 |
1990 — 1994 |
Fonstad, Clifton |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
Quantum Tunnel Optical Detectors, Modulators, and Sources New Devices For Ultra-High Speed Oeic's @ Massachusetts Institute of Technology
A three year program of research is proposed on a new class of majority carrier optoelectronic devices based on a recently developed technique for making electrical contact to the deep InAs quantum well in pseudomorphic AlAs/InAs/InGaAs resonant tunnelling diode heterostructures. These radical new devices all operate on intersubband electronic transitions between the conduction band levels of a single InAs quantum well and on tunnelling of electrons into and out of the same quantum well; they represent a major advance in the state-of-the- art-. Work is proposed on tunnel injection, quantum well level laser diodes for the 2-5 um region; on sub-picosecond quantum well level, tunnel barrier infrared photodiodes; and on ultrafast quantum well level, tunnel barrier optoelectronic modulators and non-linear optical components.
|
0.915 |
1994 — 1998 |
Warde, Cardinal Fonstad, Clifton |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
Development and Applications of Cascaded Gaas-Based Oeic Signal Processors @ Massachusetts Institute of Technology
9407755 Warde 1. Design, fabricate and characterize 2-D arrays of GaAs-based optoelectronic circuits in which each pixel consists of an optical detector, transistor logic and analog decision circuits, and a light modulation or generation element. Initially, ferroelectric liquid crystals will be used for light modulation element and ultimately, laser diodes will be used for light generation. Nearest neighbor interpixel electrical communication and local configuration memory will also be incorporated. 2. Build versatile hybrid optical processors by employing these arrays of OEICs cascaded in conjunction with in-house fabricated high efficiency computer-generated holograms, a 2-D detector array and an electronic controller. 3. Characterize these optical processors and demonstrate their operation in systems for solving difficult pattern recognition tasks. In specific, these OEIC processors will be programmed with algorithms implementing unconstrained handwritten character and word recognition functions we have developed. ***
|
0.915 |
1994 — 1998 |
Fonstad, Clifton |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
Intersubband Optoelectronic Devices in the 1.55um Range @ Massachusetts Institute of Technology
9408155 Fonstad Recent NSF-funded research at MIT has shown that InGaA1As quantum- well, tunnel-barrier heterostructures can be produced with intersubband energy level separations (n = 1 to n = 2) as large as 0.8 eV (1.55 um) and with TE-, as well as TM-, optical activity. The proposed research project builds on these results, and will focus (1) on developing structures with even larger level separations; (2) on using femto-second pulse-probe techniques to measure upper state lifetimes in quantum wells; (3) on studying the optical properties (index of refraction and absorption coefficient) in the vicinity of the intersubband absorption peaks, and on studying bias- and population-induced changes in these properties; and (4) on incorporating quantum-well, tunnel-barrier heterostructures in waveguide geometry optoelectronic devices (modulators, switches, and detectors). The excited state lifetimes in quantum wells are inherently very short (and can be shortened further using their tunnel barriers) so it is anticipated that this research will lead to the realization of faster, lower power devices than are presently available in the 1.5 um spectral range. It is also anticipated that these devices will show superior temperature stability because they are based on intersubband, rather than band-to-band processes. ***
|
0.915 |
2001 — 2004 |
Fonstad, Clifton |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
Collaborative Research On Monolithic Optoelectronic Integrated Circuits For Biomedical Sensing Applications @ Massachusetts Institute of Technology
This proposal describes a three year collaborative research program by a multi-university team of device, electronics, and biomedical investigators applying and extending newly emerging technologies for monolithic optoelectronic integration to address problems and needs of biomedical research and diagnosis. Researchers at MIT have recently demonstrated unique monolithic optoelectronic integrated circuits (OEICs) of unprecedented complexity and performance, and their ability now to monolithically integrate light sources and detectors with complex high density, high performance electronic circuitry opens the way to the invention and realization of a wide variety of sensors and measurement arrays for medical research and diagnostics. It is this area which the proposed effort will address. The technologies for monolithic optoelectronic integration which are under development at MIT are sufficiently advanced that they can be applied immediately to solve a variety of problems, and one area that is ripe with applications and needs that are addressable with the current technology is biomedical research and practice. From the numerous possible target applications in biomedicine, we have identified as an initial vehicle for applying this technology a integrated source/detector array for diffuse optical tomography (DOT). The proposed unit will permit DOT observations with a resolution exceeding that of present techniques and will lead to the use of DOT in procedures and situations in which it is currently unfeasible. Stated in the most general terms, the proposed effort will be directed at developing, applying, and making available a technology to monolithically integrate III-V optical emitters and detectors with commercially fabricated, custom-designed integrated circuits to produce high resolution two-dimensional arrays of individually addressable smart excitor/sensor pixels tailored for biomedical research applications and studies. A representative pixel might measure 250 to 500 microns on a side, and contain, for example, a diode light emitter (LED or laser), one or more light sensors, and a significant amount of electronic signal processing circuitry. This basic unit is a building block from which a wide variety of biomedical optical measurement systems can be realized in a very rugged, compact chip-size format. It promises to lead, in the future, to totally new sensor geometries and measurement procedures. The challenges that the program will face include continuing development of the OEIC technology and adapting this technology for biomedical research; developing suitable signal processing algorithms and designing compact, high performance signal processing circuit arrays in the relevant electronics technologies to interface with the optoelectronic devices; and suitably packaging the OEIC chips for their biomedical utilization. The project team will be aided in this effort by its strong links with the Northeastern University Center for Subsurface Sensing and Imaging Systems, the Massachusetts General Hospital NMR Center, the University of Utah NIH/NCRR Center for Bioelectric Field Modeling, Simulations and Visualization, and the MIT Microsystems Technology Laboratory, and by integrated circuit processing support from Vitesse Semiconductor Corporation.
|
0.915 |
2002 — 2007 |
Warde, Cardinal Fonstad, Clifton |
N/AActivity Code Description: No activity code was retrieved: click on the grant title for more information |
Rugged, Compact, Modular Oeic Co-Processor @ Massachusetts Institute of Technology
The objective of this research program is to develop algorithms and architectures, and fabricate and demonstrate a rugged, compact, modular, versatile, opt electronic, integrated-circuit (OEIC) neural network and fuzzy logic coprocessor system that would work in conjunction with the standard PC microprocessor. This OEIC co-processor will perform sophisticated parallel and/or fuzzy processing operations more efficiently than the standard PC microprocessor. The proposed OElC co-processor will be about the size of a CD-ROM drive, and thus would fit easily inside the case of a conventional personal computer. Another important goal of the program is that this compact OEIC co-processor be amenable to mass manufacturing.
To demonstrate the feasibility of the co-processor, the proposed hardware development tasks include: (I) design, fabrication and characterization of novel 2-D arrays of GaAs-SOS (silicon-on sapphire) OEIC cascadable smart pixels with a detector, integrated-circuit logic and a light source in each pixel (resonant cavity light-emitting diodes (RCLEDs) in the first two years of the program, and vertical-cavity surface-emitting lasers (VCSELs) replacing the RCLEDs in the third year), (2) design, fabrication and characterization of novel reconfigurable optical interconnection elements based on arrays of Bragg-holographic phase gratings, (3) aligning (with the help of a mask aligner) and gluing all the components of the co-processor (OEICs. interconnection elements, and output photodetector array) together into a rugged, compact, modular multi-layer sandwich configuration so as to permanently solve any micro-optics alignment problems, and (4) characterizing the resulting high-speed, multilayer optoelectronic co-processor. The early focus of the program will be on neural network configurations. So in addition to the above-mentioned fabrication tasks, the PI will also carry' out the following theoretical, modeling and simulation tasks: (a) develop algorithms, especially those suitable for programmable nearest-neighbor interconnections (e.g. pulse-coupled networks) to solve a large class of multi-dimensional information processing problems, and (b) explore the application of these novel co-processors to three different types of problems: (i) associative-memory-based pattern recognition, (ii) medical image segmentation and (iii) fusion of a set of low-contrast spectro-polarimetric infrared images into a single high-contrast image.
|
0.915 |