Jie Yuan, Ph.D.
Affiliations: | University of Pennsylvania, Philadelphia, PA, United States |
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"Jie Yuan"Mean distance: 24.44 (cluster 39)
Parents
Sign in to add mentorNabil Hassan Farhat | grad student | 2006 | Penn | |
(The mixed -signal design for a silicon Cort -X: A pathway to an artificial brain.) | ||||
Jan Van der Spiegel | grad student | 2006 | Penn (E-Tree) | |
(The mixed -signal design for a silicon Cort -X: A pathway to an artificial brain.) |
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Publications
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Niu H, Yuan J. (2020) An Efficient Spur-Aliasing-Free Spectral Calibration Technique in Time-Interleaved ADCs Ieee Transactions On Circuits and Systems. 67: 2229-2238 |
Mohamad S, Yuan J, Bermak A. (2020) A 102.2-dB, 181.1-dB FoM Extended Counting Analog-to-Digital Converter With Capacitor Scaling Ieee Journal of Solid-State Circuits. 55: 1351-1360 |
Wu C, Yuan J. (2019) A 12-Bit, 300-MS/s Single-Channel Pipelined-SAR ADC With an Open-Loop MDAC Ieee Journal of Solid-State Circuits. 54: 1446-1454 |
Mohamad S, Yuan J, Bermak A. (2018) Power Bounds and Energy Efficiency in Incremental |
Guo J, Ng W, Yuan J, et al. (2015) A 200-Channel Area-Power-Efficient Chemical and Electrical Dual-Mode Acquisition IC for the Study of Neurodegenerative Diseases. Ieee Transactions On Biomedical Circuits and Systems |
Huang J, Yang S, Yuan J. (2015) A 75 dB SNDR 10-MHz Signal Bandwidth Gm-C-Based Sigma-Delta Modulator With a Nonlinear Feedback Compensation Technique Ieee Transactions On Circuits and Systems. 62: 2216-2226 |
Xu R, Ng WC, Yuan J, et al. (2014) A 1/2.5 inch VGA 400 fps CMOS Image Sensor With High Sensitivity for Machine Vision Ieee Journal of Solid-State Circuits. 49: 2342-2351 |
Yuan J, Fung SW, Chan KY, et al. (2012) An Interpolation-Based Calibration Architecture for Pipeline ADC With Nonlinear Error Ieee Transactions On Instrumentation and Measurement. 61: 17-25 |
Yuan J, Fung SW, Chan KY, et al. (2012) A 12-bit 20 MS/s 56.3 mW Pipelined ADC With Interpolation-Based Nonlinear Calibration Ieee Transactions On Circuits and Systems. 59: 555-565 |
Liu B, Yuan J. (2012) A Quantum-Limited Highly Linear Monolithic CMOS Detector for Computed Tomography Ieee Transactions On Circuits and Systems. 59: 566-574 |