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Nur A. Touba

Affiliations:

Electrical and Computer Engineering (Computer Engineering)

University of Texas at Austin, Austin, Texas, U.S.A.

Area:

Electronics and Electrical Engineering

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Parents

Edward J. Mccluskey	grad student	1996	Stanford (Computer Science Tree)
(Synthesis Techniques for Pseudo-Random Built-In Self-Test.)

Children

Debaleena Das	grad student	2000	UT Austin
Bahram Pouya	grad student	2000	UT Austin
Jayabrata Ghosh Dastidar	grad student	2001	UT Austin
Abhijit Jas	grad student	2001	UT Austin
Eric W. MacDonald	grad student	2002	UT Austin
Ranganathan Sankaralingam	grad student	2002	UT Austin
Kartik Mohanram	grad student	2003	UT Austin
Kedarnath J. Balakrishnan	grad student	2004	UT Austin
Krishna V. Chakravadhanula	grad student	2004	UT Austin
Shalini Ghosh	grad student	2005	UT Austin
Jinkyu Lee	grad student	2006	UT Austin
Avijit Dutta	grad student	2007	UT Austin
Richard D. Putman	grad student	2008	UT Austin
Joon S. Yang	grad student	2009	UT Austin
Geewhun Seok	grad student	2011	UT Austin

Collaborators

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Publications

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Das A, Touba NA. (2020) A Single Error Correcting Code with One-Step Group Partitioned Decoding Based on Shared Majority-Vote Electronics. 9: 709
Das A, Touba NA. (2020) A New Class of Single Burst Error Correcting Codes with Parallel Decoding Ieee Transactions On Computers. 69: 253-259
Das A, Sanchez-Macian A, Garcia-Herrero F, et al. (2019) Enhanced Limited Magnitude Error Correcting Codes for Multilevel Cell Main Memories Ieee Transactions On Nanotechnology. 18: 1023-1026
Das A, Touba NA. (2019) Efficient One-Step Decodable Limited Magnitude Error Correcting Codes for Multilevel Cell Main Memories Ieee Transactions On Nanotechnology. 18: 575-583
Lee T, Touba NA, Yang J. (2017) Enhancing Test Compression With Dependency Analysis for Multiple Expansion Ratios Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 36: 1571-1579
Yang JS, Chung J, Touba NA. (2016) Enhancing Superset X-Canceling Method with Relaxed Constraints on Fault Observation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 35: 298-308
Muthyala SS, Touba NA. (2015) Reducing test time for 3D-ICs by improved utilization of test elevators Ieee/Ifip International Conference On Vlsi and System-On-Chip, Vlsi-Soc. 2015
Muthyala SS, Touba NA. (2015) Improving test compression with scan feedforward techniques Proceedings - International Test Conference. 2015
Muthyala SS, Touba NA. (2015) Efficient utilization of test elevators to reduce test time in 3D-ICs Ifip Advances in Information and Communication Technology. 464: 21-38
Yang JS, Touba NA. (2014) Test point insertion with control point by greater use of existing functional flip-flops Etri Journal. 36: 942-952

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