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Mingoo Seok - Publications

Affiliations: 
Electrical Engineering Columbia University, New York, NY 
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62 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2021 Chundi PK, Wang D, Kim SJ, Yang M, Cerqueira JP, Kang J, Jung S, Kim S, Seok M. Always-On Sub-Microwatt Spiking Neural Network Based on Spike-Driven Clock- and Power-Gating for an Ultra-Low-Power Intelligent Device. Frontiers in Neuroscience. 15: 684113. PMID 34354559 DOI: 10.3389/fnins.2021.684113  0.347
2020 Yin S, Jiang Z, Kim M, Gupta T, Seok M, Seo J. Vesti: Energy-Efficient In-Memory Computing Accelerator for Deep Neural Networks Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 28: 48-61. DOI: 10.1109/Tvlsi.2019.2940649  0.436
2020 Jiang Z, Yin S, Seo J, Seok M. C3SRAM: An In-Memory-Computing SRAM Macro Based on Robust Capacitive Coupling Computing Mechanism Ieee Journal of Solid-State Circuits. 55: 1888-1897. DOI: 10.1109/Jssc.2020.2992886  0.432
2020 Cerqueira JP, Repetti TJ, Pu Y, Priyadarshi S, Kim MA, Seok M. Catena: A Near-Threshold, Sub-0.4-mW, 16-Core Programmable Spatial Array Accelerator for the Ultralow-Power Mobile and Embedded Internet of Things Ieee Journal of Solid-State Circuits. 55: 2270-2284. DOI: 10.1109/Jssc.2020.2978137  0.468
2020 Yin S, Jiang Z, Seo J, Seok M. XNOR-SRAM: In-Memory Computing SRAM Macro for Binary/Ternary Deep Neural Networks Ieee Journal of Solid-State Circuits. 55: 1733-1743. DOI: 10.1109/Jssc.2019.2963616  0.473
2020 Shan W, Dai W, Wan L, Lu M, Shi L, Seok M, Yang J. A Bi-Directional, Zero-Latency Adaptive Clocking Circuit in a 28-nm Wide AVFS System Ieee Journal of Solid-State Circuits. 55: 826-836. DOI: 10.1109/Jssc.2019.2959494  0.427
2020 Carusone TC, Seok M, Chang H, Chang M. Introduction to the Special Issue on the 2019 IEEE International Solid-State Circuits Conference (ISSCC) Ieee Journal of Solid-State Circuits. 55: 3-5. DOI: 10.1109/Jssc.2019.2953371  0.373
2019 Kim S, Cerqueira JP, Seok M. A Near-Threshold Spiking Neural Network Accelerator With a Body-Swapping-Based $In \,\,Situ$ Error Detection and Correction Technique Ieee Transactions On Very Large Scale Integration Systems. 27: 1886-1896. DOI: 10.1109/Tvlsi.2019.2910792  0.482
2019 Guan T, Zeng X, Seok M. Recursive Synaptic Bit Reuse: An Efficient Way to Increase Memory Capacity in Associative Memory Ieee Transactions On Very Large Scale Integration Systems. 27: 757-768. DOI: 10.1109/Tvlsi.2018.2884250  0.331
2019 Yang M, Yeh C, Zhou Y, Cerqueira JP, Lazar AA, Seok M. Design of an Always-On Deep Neural Network-Based 1-$\mu$ W Voice Activity Detector Aided With a Customized Software Model for Analog Feature Extraction Ieee Journal of Solid-State Circuits. 54: 1764-1777. DOI: 10.1109/Jssc.2019.2894360  0.34
2018 Kim S, Seok M. A Sub-50 µm2, Voltage-Scalable, Digital-Standard-Cell-Compatible Thermal Sensor Frontend for On-Chip Thermal Monitoring Journal of Low Power Electronics and Applications. 8: 16. DOI: 10.3390/Jlpea8020016  0.363
2018 Yang T, Kim D, Li J, Kinget PR, Seok M. $In~Situ$ and In-Field Technique for Monitoring and Decelerating NBTI in 6T-SRAM Register Files Ieee Transactions On Very Large Scale Integration Systems. 26: 2241-2253. DOI: 10.1109/Tvlsi.2018.2856528  0.406
2018 Li J, Yang T, Yang M, Kinget PR, Seok M. An Area-Efficient Microprocessor-Based SoC With an Instruction-Cache Transformable to an Ambient Temperature Sensor and a Physically Unclonable Function Ieee Journal of Solid-State Circuits. 53: 728-737. DOI: 10.1109/Jssc.2018.2791460  0.396
2017 Jin W, Kim S, He W, Mao Z, Seok M. In Situ Error Detection Techniques in Ultralow Voltage Pipelines: Analysis and Optimizations Ieee Transactions On Very Large Scale Integration Systems. 25: 1032-1043. DOI: 10.1109/Tvlsi.2016.2625598  0.415
2017 Cerqueira JP, Seok M. Temporarily Fine-Grained Sleep Technique for Near- and Subthreshold Parallel Architectures Ieee Transactions On Very Large Scale Integration Systems. 25: 189-197. DOI: 10.1109/Tvlsi.2016.2576280  0.459
2017 Huang Y, Guo N, Seok M, Tsividis Y, Sethumadhavan S. Analog Computing in a Modern Context: A Linear Algebra Accelerator Case Study Ieee Micro. 37: 30-38. DOI: 10.1109/Mm.2017.55  0.382
2017 Kim D, Seok M. A Fully Integrated Digital Low-Dropout Regulator Based on Event-Driven Explicit Time-Coding Architecture Ieee Journal of Solid-State Circuits. 52: 3071-3080. DOI: 10.1109/Jssc.2017.2740269  0.485
2017 Jin W, Kim S, He W, Mao Z, Seok M. Near- and Sub- $V_{t}$ Pipelines Based on Wide-Pulsed-Latch Design Techniques Ieee Journal of Solid-State Circuits. 52: 2475-2487. DOI: 10.1109/Jssc.2017.2717927  0.404
2017 Li J, Seo J, Kymissis I, Seok M. Triple-Mode, Hybrid-Storage, Energy Harvesting Power Management Unit: Achieving High Efficiency Against Harvesting and Load Power Variabilities Ieee Journal of Solid-State Circuits. 52: 2550-2562. DOI: 10.1109/Jssc.2017.2715827  0.416
2016 Zheng L, Wu Z, Seok M, Wang X, Liu Q. High-Accuracy Compressed Sensing Decoder Based on Adaptive (l0,l1) Complex Approximate Message Passing: Cross-layer Design Ieee Transactions On Circuits and Systems I: Regular Papers. DOI: 10.1109/Tcsi.2016.2582782  0.305
2016 Li J, Seok M. Ultra-Compact and Robust Physically Unclonable Function Based on Voltage-Compensated Proportional-to-Absolute-Temperature Voltage Generators Ieee Journal of Solid-State Circuits. 51: 2192-2202. DOI: 10.1109/Jssc.2016.2586498  0.469
2016 Guo N, Huang Y, Mai T, Patil S, Cao C, Seok M, Sethumadhavan S, Tsividis Y. Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time Ieee Journal of Solid-State Circuits. DOI: 10.1109/Jssc.2016.2543729  0.396
2016 Kim D, Seok M. 8.2 Fully integrated low-drop-out regulator based on event-driven PI control Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 59: 148-149. DOI: 10.1109/ISSCC.2016.7417950  0.368
2015 Carta F, Hlaing H, Edrees H, Yang S, Seok M, Kymissis I. Co-development of complementary technology and modified-CPL family for organic digital integrated circuits Mrs Proceedings. 1795: 19-25. DOI: 10.1557/Opl.2015.564  0.413
2015 Kim S, Seok M. Reconfigurable regenerator-based interconnect design for ultra-dynamic-voltage-scaling systems Proceedings of the International Symposium On Low Power Electronics and Design. 2015: 99-104. DOI: 10.1145/2627369.2627632  0.352
2015 Li J, Seok M. A 3.07μm2/bitcell physically unclonable function with 3.5% and 1% bit-instability across 0 to 80°C and 0.6 to 1.2V in a 65nm CMOS Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. 2015: C250-C251. DOI: 10.1109/VLSIC.2015.7231276  0.304
2015 Seo JS, Seok M. Digital CMOS neuromorphic processor design featuring unsupervised online learning Ieee/Ifip International Conference On Vlsi and System-On-Chip, Vlsi-Soc. 2015: 49-51. DOI: 10.1109/VLSI-SoC.2015.7314390  0.314
2015 Yang T, Kim S, Kinget PR, Seok M. Compact and Supply-Voltage-Scalable Temperature Sensors for Dense On-Chip Thermal Monitoring Ieee Journal of Solid-State Circuits. 50: 2773-2785. DOI: 10.1109/Jssc.2015.2476815  0.413
2015 Kim S, Seok M. Variation-Tolerant, Ultra-Low-Voltage Microprocessor With a Low-Overhead, Within-a-Cycle In-Situ Timing-Error Detection and Correction Technique Ieee Journal of Solid-State Circuits. 50: 1478-1490. DOI: 10.1109/Jssc.2015.2418713  0.479
2015 Kim D, Li J, Seok M. Energy-optimal voltage model supporting a wide range of nodal switching rates for early design-space exploration Proceedings of the 33rd Ieee International Conference On Computer Design, Iccd 2015. 383-386. DOI: 10.1109/ICCD.2015.7357129  0.304
2014 Kim S, Seok M. R-processor: 0.4V resilient processor with a voltage-scalable and low-overhead in-situ error detection and correction technique in 65nm CMOS Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. DOI: 10.1109/VLSIC.2014.6858421  0.394
2013 Lee Y, Seok M, Hanson S, Sylvester D, Blaauw D. Achieving ultralow standby power with an efficient SCCMOS bias generator Ieee Transactions On Circuits and Systems Ii: Express Briefs. 60: 842-846. DOI: 10.1109/Tcsii.2013.2281919  0.396
2013 Ghaed MH, Chen G, Haque RU, Wieckowski M, Kim Y, Kim G, Lee Y, Lee I, Fick D, Kim D, Seok M, Wise KD, Blaauw D, Sylvester D. Circuits for a cubic-millimeter energy-autonomous wireless intraocular pressure monitor Ieee Transactions On Circuits and Systems I: Regular Papers. 60: 3152-3162. DOI: 10.1109/Tcsi.2013.2265973  0.464
2013 Seok M, Cao Z. Parallelism and pipelining in ultra low voltage digital circuits 2013 Ieee Soi-3d-Subthreshold Microelectronics Technology Unified Conference, S3s 2013. DOI: 10.1109/S3S.2013.6716552  0.421
2013 Fojtik M, Kim D, Chen G, Lin YS, Fick D, Park J, Seok M, Chen MT, Foo Z, Blaauw D, Sylvester D. A millimeter-scale energy-autonomous sensor system with stacked battery and solar cells Ieee Journal of Solid-State Circuits. 48: 801-813. DOI: 10.1109/Jssc.2012.2233352  0.415
2013 Chen Y, Seok M, Nowick SM. Robust and energy-efficient asynchronous dynamic pipelines for ultra-low-voltage operation using adaptive keeper control Proceedings of the International Symposium On Low Power Electronics and Design. 267-272. DOI: 10.1109/ISLPED.2013.6629307  0.379
2013 Liu J, Nowick SM, Seok M. Soft MOUSETRAP: A bundled-data asynchronous pipeline scheme tolerant to random variations at ultra-low supply voltages Proceedings - International Symposium On Asynchronous Circuits and Systems. 1-7. DOI: 10.1109/ASYNC.2013.29  0.33
2012 Seok M. Performance and energy-efficiency improvement through modified CPL in organic transistor integrated circuits Proceedings of the International Symposium On Low Power Electronics and Design. 215-220. DOI: 10.1145/2333660.2333713  0.303
2012 Seok M. A fine-grained many V T design methodology for ultra low voltage operations Proceedings of the International Symposium On Low Power Electronics and Design. 161-166. DOI: 10.1145/2333660.2333702  0.359
2012 Seok M. Decoupling capacitor design strategy for minimizing supply noise of ultra low voltage circuits Proceedings - Design Automation Conference. 968-973. DOI: 10.1145/2228360.2228534  0.373
2012 Seok M, Hanson S, Blaauw D, Sylvester D. Sleep mode analysis and optimization with minimal-sized power gating switch for ultra-low V dd operation Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 605-615. DOI: 10.1109/Tvlsi.2011.2109069  0.425
2012 Jeon D, Seok M, Zhang Z, Blaauw D, Sylvester D. Design methodology for voltage-overscaled ultra-low-power systems Ieee Transactions On Circuits and Systems Ii: Express Briefs. 59: 952-956. DOI: 10.1109/Tcsii.2012.2231036  0.425
2012 Seok M, Kim G, Blaauw D, Sylvester D. A portable 2-transistor picowatt temperature-compensated voltage reference operating at 0.5 v Ieee Journal of Solid-State Circuits. 47: 2534-2545. DOI: 10.1109/Jssc.2012.2206683  0.462
2012 Jeon D, Seok M, Chakrabarti C, Blaauw D, Sylvester D. A super-pipelined energy efficient subthreshold 240 MS/s FFT core in 65 nm CMOS Ieee Journal of Solid-State Circuits. 47: 23-34. DOI: 10.1109/Jssc.2011.2169311  0.514
2012 Seok M, Jeon D, Chakrabati C, Blaauw D, Sylvester D. Extending energy-saving voltage scaling in ultra low voltage integrated circuit designs Icicdt 2012 - Ieee International Conference On Integrated Circuit Design and Technology. DOI: 10.1109/ICICDT.2012.6232880  0.406
2011 Seok M, Blaauw D, Sylvester D. Robust clock network design methodology for ultra-low voltage operations Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 1: 120-130. DOI: 10.1109/Jetcas.2011.2160753  0.473
2011 Seok M, Chen G, Hanson S, Wieckowski M, Blaauw D, Sylvester D. CAS-FEST 2010: Mitigating variability in near-threshold computing Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 1: 42-49. DOI: 10.1109/Jetcas.2011.2135550  0.434
2011 Seok M, Jeon D, Chakrabarti C, Blaauw D, Sylvester D. A 0.27V 30MHz 17.7nJ/transform 1024-pt complex FFT core with super-pipelining Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 342-343. DOI: 10.1109/ISSCC.2011.5746346  0.398
2011 Kim D, Chen G, Fojtik M, Seok M, Blaauw D, Sylvester D. A 1.85fW/bit ultra low leakage 10T SRAM with speed compensation scheme Proceedings - Ieee International Symposium On Circuits and Systems. 69-72. DOI: 10.1109/ISCAS.2011.5937503  0.306
2011 Jeon D, Seok M, Chakrabarti C, Blaauw D, Sylvester D. Energy-optimized high performance FFT processor Icassp, Ieee International Conference On Acoustics, Speech and Signal Processing - Proceedings. 1701-1704. DOI: 10.1109/ICASSP.2011.5946828  0.386
2011 Seok M, Jeon D, Chakrabarti C, Blaauw D, Sylvester D. Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design Proceedings - Design Automation Conference. 990-995.  0.37
2010 Chen G, Fojtik M, Kim D, Fick D, Park J, Seok M, Chen MT, Foo Z, Sylvester D, Blaauw D. Millimeter-scale nearly perpetual sensor system with stacked battery and solar cells Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 53: 288-289. DOI: 10.1109/ISSCC.2010.5433921  0.302
2010 Seok M, Hanson S, Wieckowski M, Chen GK, Lin YS, Blaauw D, Sylvester D. Circuit design advances to enable ubiquitous sensing environments Iscas 2010 - 2010 Ieee International Symposium On Circuits and Systems: Nano-Bio Circuit Fabrics and Systems. 285-288. DOI: 10.1109/ISCAS.2010.5537867  0.396
2010 Seok M, Kim G, Blaauw D, Sylvester D. Variability analysis of a digitally trimmable ultra-low power voltage reference Esscirc 2010 - 36th European Solid State Circuits Conference. 110-113. DOI: 10.1109/ESSCIRC.2010.5619816  0.359
2010 Seok MS, Song IS, Jin S, Jeon JW. A real-time window-based image processing architecture using a mapping table Iccas 2010 - International Conference On Control, Automation and Systems. 1678-1681.  0.327
2009 Hanson S, Seok M, Lin YS, Foo Z, Kim D, Lee Y, Liu N, Sylvester D, Blaauw Dr. D. A low-voltage processor for sensing applications with picowatt standby mode Ieee Journal of Solid-State Circuits. 44: 1145-1155. DOI: 10.1109/Jssc.2009.2014205  0.448
2009 Seok M, Kim G, Sylvester D, Blaauw D. A 0.5V 2.2pW 2-transistor voltage reference Proceedings of the Custom Integrated Circuits Conference. 577-580. DOI: 10.1109/CICC.2009.5280773  0.352
2008 Hanson S, Seok M, Sylvester D, Blaauw D. Nanometer device scaling in subthreshold logic and SRAM Ieee Transactions On Electron Devices. 55: 175-185. DOI: 10.1109/Ted.2007.911033  0.376
2008 Hanson S, Zhai B, Seok M, Cline B, Zhou K, Singhal M, Minuth M, Olson J, Nazhandali L, Austin T, Sylvester D, Blaauw D. Exploring variability and performance in a sub-200-mV processor Ieee Journal of Solid-State Circuits. 43: 881-890. DOI: 10.1109/Jssc.2008.917505  0.463
2008 Sylvester D, Hanson S, Seok M, Yu-Shiang L, Blaauw D. Designing robust ultra-low power circuits Technical Digest - International Electron Devices Meeting, Iedm. DOI: 10.1109/IEDM.2008.4796713  0.323
2008 Seok M, Hanson S, Seo JS, Sylvester D, Blaauw D. Robust ultra-low voltage ROM design Proceedings of the Custom Integrated Circuits Conference. 423-426. DOI: 10.1109/CICC.2008.4672110  0.413
2007 Seok M, Hanson S, Sylvester D, Blaauw D. Analysis and optimization of sleep modes in subthreshold circuit design Proceedings - Design Automation Conference. 694-699. DOI: 10.1109/DAC.2007.375253  0.322
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