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Cheng Jia, Ph.D. - Publications

Affiliations: 
2005 Georgia Institute of Technology, Atlanta, GA 
Area:
Electronics and Electrical Engineering
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4 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2009 Jia C, Milor L. A DLL design for testing I/O setup and hold times Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 17: 1579-1592. DOI: 10.1109/Tvlsi.2008.2005522  0.487
2008 Jia C, Milor L. A BIST circuit for DLL fault detection Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 16: 1687-1695. DOI: 10.1109/Tvlsi.2008.2001732  0.482
2007 Milor L, Jia C. BIST for testing of delay Proceedings of the 2nd Ieee International Workshop On Advances in Sensors and Interfaces, Iwasi. DOI: 10.1109/IWASI.2007.4420031  0.365
2003 Jia C, Milor L. A BIST solution for the test of I/O speed Ieee International Test Conference (Tc). 1023-1030.  0.355
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