| Year |
Citation |
Score |
| 2015 |
Chen K, Li S, Ahn JH, Muralimanohar N, Zhao J, Xu C, O S, Xie Y, Brockman JB, Jouppi NP. History-Assisted Adaptive-Granularity Caches (HAAG$) for high performance 3D DRAM architectures Proceedings of the International Conference On Supercomputing. 2015: 251-261. DOI: 10.1145/2751205.2751227 |
0.591 |
|
| 2013 |
Li S, Ahn JH, Strong RD, Brockman JB, Tullsen DM, Jouppi NP. The McPAT framework for multicore and manycore architectures: Simultaneously modeling power, area, and timing Transactions On Architecture and Code Optimization. 10. DOI: 10.1145/2445572.2445577 |
0.466 |
|
| 2012 |
Li S, Chen K, Hsieh MY, Muralimanohar N, Kersey CD, Brockman JB, Rodrigues AF, Jouppi NP. System implications of memory reliability in exascale computing Hp Laboratories Technical Report. DOI: 10.1145/2063384.2063445 |
0.474 |
|
| 2012 |
Karda K, Sutar S, Brockman JB, Nahas JJ, Seabaugh A. Bistable-body tunnel SRAM Ieee Transactions On Nanotechnology. 11: 1067-1072. DOI: 10.1109/Tnano.2010.2053555 |
0.345 |
|
| 2012 |
Li S, Yoon DH, Chen K, Zhao J, Ahn JH, Brockman JB, Xie Y, Jouppi NP. MAGE: Adaptive granularity and ECC for resilient and power efficient memory systems International Conference For High Performance Computing, Networking, Storage and Analysis, Sc. DOI: 10.1109/SC.2012.73 |
0.506 |
|
| 2012 |
Chen K, Li S, Muralimanohar N, Ahn JH, Brockman JB, Jouppi NP. CACTI-3DD: Architecture-level modeling for 3D die-stacked DRAM main memory Proceedings -Design, Automation and Test in Europe, Date. 33-38. |
0.414 |
|
| 2011 |
Li S, Kuntz S, Brockman JB, Kogge PM. Lightweight Chip Multi-Threading (LCMT): Maximizing Fine-Grained Parallelism On-Chip Ieee Transactions On Parallel and Distributed Systems. 22: 1178-1191. DOI: 10.1109/Tpds.2010.169 |
0.68 |
|
| 2009 |
Li S, Ahn JH, Strong RD, Brockman JB, Tullsen DM, Jouppi NP. McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures Proceedings of the Annual International Symposium On Microarchitecture, Micro. 469-480. DOI: 10.1145/1669112.1669172 |
0.409 |
|
| 2008 |
Thoziyoor S, Ahn JH, Monchiero M, Brockman JB, Jouppi NP. A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory Hierarchies Acm Sigarch Computer Architecture News. 36: 51-62. DOI: 10.1145/1394608.1382127 |
0.543 |
|
| 2008 |
Thoziyoor S, Ahn JH, Monchiero M, Brockman JB, Jouppi NP. A comprehensive memory modeling tool and its application to the design and analysis of future memory hierarchies Proceedings - International Symposium On Computer Architecture. 51-62. DOI: 10.1109/ISCA.2008.16 |
0.712 |
|
| 2006 |
Kogge PM, Brockman JB. Redundancy in multi-core memory-rich application-specific PIM chips Proceedings of the Innovative Architecture For Future Generation High-Performance Processors and Systems. 13-20. DOI: 10.1109/IWIAS.2006.35 |
0.6 |
|
| 2006 |
Springer PL, Rodrigues A, Brockman JB. SALT: The simulator for the analysis of LWP timing International Symposium On Performance Evaluation of Computer and Telecommunication Systems 2006, Spects'06, Part of the 2006 Summer Simulation Multiconference, Summersim'06. 261-268. |
0.488 |
|
| 2004 |
Brockman JB, Thoziyoor S, Kuntz SK, Kogge PM. A low cost, multithreaded processing-in-memory system Acm International Conference Proceeding Series. 68: 16-22. DOI: 10.1145/1054943.1054946 |
0.545 |
|
| 2003 |
Upchurch E, Sterling T, Brockman JB. Analysis and modeling of advanced PIM architecture design tradeoffs Proceedings of the Innovative Architecture For Future Generation High-Performance Processors and Systems. 2003: 66-75. DOI: 10.1109/IWIA.2003.1262784 |
0.532 |
|
| 2001 |
Yerosheva LV, Kuntz SK, Brockman JB, Kogge PM. A microserver view of HTMT Proceedings - 15th International Parallel and Distributed Processing Symposium, Ipdps 2001. DOI: 10.1109/IPDPS.2001.924931 |
0.719 |
|
| 1998 |
Johnson EW, Brockman JB. Measurement and analysis of sequential design processes Acm Transactions On Design Automation of Electronic Systems. 3: 1-20. DOI: 10.1145/270580.270581 |
0.379 |
|
| 1996 |
Wujek BA, Renaud JE, Batill SM, Brockman JB. Concurrent subspace optimization using design variable sharing in a distributed computing environment Concurrent Engineering Research and Applications. 4: 361-376. DOI: 10.1177/1063293X9600400405 |
0.372 |
|
| 1996 |
Johnson EW, Brockman JB. Towards a model for electronic design process refinement Computers in Industry. 30: 27-36. DOI: 10.1016/0166-3615(96)00017-6 |
0.353 |
|
| 1996 |
Kogge PM, Bass SC, Brockman JB, Chen DZ, Sha E. Pursuing a petaflop: point designs for 100 TF computers using PIM technologies Frontiers of Massively Parallel Computation - Conference Proceedings. 88-97. |
0.467 |
|
| 1989 |
Brockman JB, Director SW. Predictive Subset Testing: Optimizing IC Parametric Performance Testing for Quality, Cost, and Yield Ieee Transactions On Semiconductor Manufacturing. 2: 104-113. DOI: 10.1109/66.29679 |
0.341 |
|
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