Year |
Citation |
Score |
2017 |
Huang Y, Chiang M, Wang S, Fossum JG. GAAFET Versus Pragmatic FinFET at the 5nm Si-Based CMOS Technology Node Ieee Journal of the Electron Devices Society. 5: 164-169. DOI: 10.1109/Jeds.2017.2689738 |
0.599 |
|
2013 |
Saha S, Onyegam EU, Sarkar D, Hilali MM, Rao RA, Mathew L, Jawarani D, Xu D, Smith RS, Das UK, Fossum JG, Banerjee SK. Exfoliated ∼25μm Si foil for solar cells with improved light-trapping Materials Research Society Symposium Proceedings. 1493: 51-58. DOI: 10.1557/Opl.2013.222 |
0.52 |
|
2012 |
Wu Q, Chen J, Lu Z, Zhou Z, Luo J, Chai Z, Yu T, Qiu C, Li L, Pang A, Wang X, Fossum JG. Experimental Demonstration of the High-Performance Floating-Body/Gate DRAM Cell for Embedded Memories Ieee Electron Device Letters. 33: 743-745. DOI: 10.1109/Led.2012.2190031 |
0.787 |
|
2011 |
Lu Z, Fossum JG, Zhou Z. A Floating-Body/Gate DRAM Cell Upgraded for Long Retention Time Ieee Electron Device Letters. 32: 731-733. DOI: 10.1109/Led.2011.2134065 |
0.774 |
|
2010 |
Chouksey S, Fossum JG, Agrawal S. Insights on Design and Scalability of Thin-BOX FD/SOI CMOS Ieee Transactions On Electron Devices. 57: 2073-2079. DOI: 10.1109/Ted.2010.2052420 |
0.469 |
|
2010 |
Agrawal S, Fossum JG. A Physical Model for Fringe Capacitance in Double-Gate MOSFETs With Non-Abrupt Source/Drain Junctions and Gate Underlap Ieee Transactions On Electron Devices. 57: 1069-1075. DOI: 10.1109/Ted.2010.2044266 |
0.798 |
|
2010 |
Fossum JG, Zhou Z, Mathew L, Nguyen B. SOI versus bulk-silicon nanoscale FinFETs Solid-State Electronics. 54: 86-89. DOI: 10.1016/J.Sse.2009.12.002 |
0.66 |
|
2009 |
Chouksey S, Fossum JG, Behnam A, Agrawal S, Mathew L. Threshold Voltage Adjustment in Nanoscale DG FinFETs Via Limited Source/Drain Dopants in the Channel Ieee Transactions On Electron Devices. 56: 2348-2353. DOI: 10.1109/Ted.2009.2028403 |
0.526 |
|
2009 |
Zhou Z, Fossum JG, Lu Z. Physical Insights on BJT-Based 1T DRAM Cells Ieee Electron Device Letters. 30: 565-567. DOI: 10.1109/Led.2009.2017285 |
0.774 |
|
2009 |
Lu Z, Fossum JG, Yang J, Harris HR, Trivedi VP, Chu M, Thompson SE. A Simplified Superior Floating-Body/Gate DRAM Cell Ieee Electron Device Letters. 30: 282-284. DOI: 10.1109/Led.2008.2012006 |
0.802 |
|
2008 |
Agrawal S, Fossum JG. On the Suitability of a High- $k$ Gate Dielectric in Nanoscale FinFET CMOS Technology Ieee Transactions On Electron Devices. 55: 1714-1719. DOI: 10.1109/Ted.2008.925161 |
0.469 |
|
2008 |
Lu Z, Fossum JG, Zhang W, Trivedi VP, Mathew L, Sadd M. A Novel Two-Transistor Floating-Body/Gate Cell for Low-Power Nanoscale Embedded DRAM Ieee Transactions On Electron Devices. 55: 1511-1518. DOI: 10.1109/Ted.2008.922796 |
0.797 |
|
2008 |
Chouksey S, Fossum JG. DICE: A Beneficial Short-Channel Effect in Nanoscale Double-Gate MOSFETs Ieee Transactions On Electron Devices. 55: 796-802. DOI: 10.1109/Ted.2007.914835 |
0.557 |
|
2007 |
Kim S, Fossum JG. Design Optimization and Performance Projections of Double-Gate FinFETs With Gate–Source/Drain Underlap for SRAM Application Ieee Transactions On Electron Devices. 54: 1934-1942. DOI: 10.1109/Ted.2007.901070 |
0.685 |
|
2007 |
Chowdhury MM, Trivedi VP, Fossum JG, Mathew L. Carrier Mobility/Transport in Undoped-UTB DG FinFETs Ieee Transactions On Electron Devices. 54: 1125-1131. DOI: 10.1109/Ted.2007.893669 |
0.721 |
|
2007 |
Fossum JG, Lu Z, Trivedi VP. New Insights on “Capacitorless” Floating-Body DRAM Cells Ieee Electron Device Letters. 28: 513-516. DOI: 10.1109/Led.2007.896883 |
0.786 |
|
2007 |
Lu Z, Fossum JG. Short-Channel Effects in Independent-Gate FinFETs Ieee Electron Device Letters. 28: 145-147. DOI: 10.1109/Led.2006.889236 |
0.731 |
|
2007 |
Fossum JG. Physical insights on nanoscale multi-gate CMOS design Solid-State Electronics. 51: 188-194. DOI: 10.1016/J.Sse.2007.01.020 |
0.553 |
|
2007 |
Trivedi VP, Fossum JG, Zhang W. Threshold voltage and bulk inversion effects in nonclassical CMOS devices with undoped ultra-thin bodies Solid-State Electronics. 51: 170-178. DOI: 10.1016/J.Sse.2006.10.014 |
0.755 |
|
2006 |
Zhang W, Fossum JG, Mathew L. The ITFET: A Novel FinFET-Based Hybrid Device Ieee Transactions On Electron Devices. 53: 2335-2343. DOI: 10.1109/Ted.2006.880813 |
0.599 |
|
2006 |
Kim S, Fossum J, Yang J. Modeling and Significance of Fringe Capacitance in Nonclassical CMOS Devices With Gate–Source/Drain Underlap Ieee Transactions On Electron Devices. 53: 2143-2150. DOI: 10.1109/Ted.2006.880369 |
0.807 |
|
2006 |
Chowdhury MM, Fossum JG. Physical insights on electron mobility in contemporary FinFETs Ieee Electron Device Letters. 27: 482-485. DOI: 10.1109/Led.2006.874214 |
0.381 |
|
2005 |
Zhang W, Fossum JG, Mathew L, Du Y. Physical insights regarding design and performance of independent-gate FinFETs Ieee Transactions On Electron Devices. 52: 2198-2206. DOI: 10.1109/Ted.2005.856184 |
0.546 |
|
2005 |
Kim S, Fossum JG, Trivedi VP. Bulk inversion in FinFETs and implied insights on effective gate width Ieee Transactions On Electron Devices. 52: 1993-1997. DOI: 10.1109/Ted.2005.854286 |
0.785 |
|
2005 |
Yang J, Fossum JG. On the feasibility of nanoscale triple-gate CMOS transistors Ieee Transactions On Electron Devices. 52: 1159-1164. DOI: 10.1109/Ted.2005.848109 |
0.8 |
|
2005 |
Zhang W, Fossum JG. On the threshold Voltage of strained-Si-Si/sub 1-x/Ge/sub x/ MOSFETs Ieee Transactions On Electron Devices. 52: 263-268. DOI: 10.1109/Ted.2004.842716 |
0.442 |
|
2005 |
Trivedi V, Fossum JG, Chowdhury MM. Nanoscale FinFETs with gate-source/drain underlap Ieee Transactions On Electron Devices. 52: 56-62. DOI: 10.1109/Ted.2004.841333 |
0.455 |
|
2005 |
Trivedi VP, Fossum JG. Quantum-mechanical effects on the threshold voltage of undoped double-gate MOSFETs Ieee Electron Device Letters. 26: 579-582. DOI: 10.1109/Led.2005.852741 |
0.44 |
|
2005 |
Trivedi VP, Fossum JG. Nanoscale FD/SOI CMOS: thick or thin BOX? Ieee Electron Device Letters. 26: 26-28. DOI: 10.1109/Led.2004.839624 |
0.479 |
|
2005 |
Kim S, Fossum JG. Nanoscale CMOS: potential nonclassical technologies versus a hypothetical bulk-silicon technology Solid-State Electronics. 49: 595-605. DOI: 10.1016/J.Sse.2004.12.004 |
0.711 |
|
2004 |
Lim J, Thompson SE, Fossum JG. Comparison of threshold-voltage shifts for uniaxial and biaxial tensile-stressed n-MOSFETs Ieee Electron Device Letters. 25: 731-733. DOI: 10.1109/Led.2004.837581 |
0.378 |
|
2004 |
Kim K, Fossum JG, Chuang C. Process/physics-based threshold voltage model for nano-scaled double-gate devices International Journal of Electronics. 91: 139-148. DOI: 10.1080/00207210410001675653 |
0.781 |
|
2004 |
Yang J, Fossum JG, Workman GO, Huang C. A physical model for gate-to-body tunneling current and its effects on floating-body PD/SOI CMOS devices and circuits Solid-State Electronics. 48: 259-270. DOI: 10.1016/S0038-1101(03)00272-7 |
0.786 |
|
2004 |
Fossum JG, Ge L, Chiang M, Trivedi VP, Chowdhury MM, Mathew L, Workman GO, Nguyen BY. A process/physics-based compact model for nonclassical CMOS device and circuit design Solid-State Electronics. 48: 919-926. DOI: 10.1016/J.Sse.2003.12.030 |
0.676 |
|
2003 |
Trivedi VP, Fossum JG. Scaling fully depleted SOI CMOS Ieee Transactions On Electron Devices. 50: 2095-2103. DOI: 10.1109/Ted.2003.816915 |
0.528 |
|
2003 |
Fossum JG, Zhang W. Performance projections of scaled CMOS devices and circuits with strained Si-on-SiGe channels Ieee Transactions On Electron Devices. 50: 1042-1049. DOI: 10.1109/Ted.2003.812491 |
0.466 |
|
2003 |
Fossum JG, Yang J-, Trivedi VP. Suppression of corner effects in triple-gate MOSFETs Ieee Electron Device Letters. 24: 745-747. DOI: 10.1109/Led.2003.820624 |
0.471 |
|
2003 |
Kim K, Fossum JG. Achieving the ballistic-limit current in Si MOSFETs Solid-State Electronics. 47: 721-726. DOI: 10.1016/S0038-1101(02)00330-1 |
0.733 |
|
2002 |
Fossum JG. A Simulation-Based Preview Of Extremely Scaled Double-Gate Cmos Devices And Circuits International Journal of High Speed Electronics and Systems. 12: 563-572. DOI: 10.1142/S0129156402001460 |
0.547 |
|
2002 |
Fossum JG, Ge L, Chiang M. Speed superiority of scaled double-gate CMOS Ieee Transactions On Electron Devices. 49: 808-811. DOI: 10.1109/16.998588 |
0.796 |
|
2001 |
Kim K, Fossum JG. Double-gate CMOS: symmetrical- versus asymmetrical-gate devices Ieee Transactions On Electron Devices. 48: 294-299. DOI: 10.1109/16.902730 |
0.778 |
|
2000 |
Fossum JG, Ren Z, Kim K, Lundstrom M. Extraordinarily high drive currents in asymmetrical double-gate MOSFETs Superlattices and Microstructures. 28: 525-530. DOI: 10.1006/Spmi.2000.0957 |
0.778 |
|
1998 |
Fossum J, Pelella M, Krishnan S. Scalable PD/SOI CMOS with floating bodies Ieee Electron Device Letters. 19: 414-416. DOI: 10.1109/55.728897 |
0.403 |
|
1998 |
Workman GO, Fossum JG, Krishnan S, Pelella MM. Physical modeling of temperature dependences of SOI CMOS devices and circuits including self-heating Ieee Transactions On Electron Devices. 45: 125-133. DOI: 10.1109/16.658822 |
0.429 |
|
1997 |
Chang D, Fossum JG. Simplified energy-balance model for pragmatic multi-dimensional device simulation Solid-State Electronics. 41: 1795-1802. DOI: 10.1016/S0038-1101(97)00142-1 |
0.44 |
|
1996 |
Suh D, Fossum JG, Pelella MM. Dynamic data retention and implied design criteria for floating-body SOI DRAM Ieee Electron Device Letters. 17: 385-387. DOI: 10.1109/55.511583 |
0.412 |
|
1996 |
Pelella MM, Fossum JG, Suh D, Krishnan S, Jenkins KA, Hargrove MJ. Low-voltage transient bipolar effect induced by dynamic floating-body charging in scaled PD/SOI MOSFET's Ieee Electron Device Letters. 17: 196-198. DOI: 10.1109/55.491827 |
0.541 |
|
1996 |
Krishnan S, Fossum JG. Compact non-local modeling of impact ionization in SOI MOSFETs for optimal CMOS device/circuit design Solid-State Electronics. 39: 661-668. DOI: 10.1016/0038-1101(95)00198-0 |
0.543 |
|
1995 |
Fossum JG, Krishnan S, Faynot O, Cristoloveanu S, Raynaud C. Subthreshold kinks in fully depleted SOI MOSFET's Ieee Electron Device Letters. 16: 542-544. DOI: 10.1109/55.475581 |
0.553 |
|
1995 |
Yeh PC, Fossum JG. Physical Subthreshold MOSFET Modeling Applied to Viable Design of Deep-Submicrometer Fully Depleted SOI Low-Voltage CMOS Technology Ieee Transactions On Electron Devices. 42: 1605-1613. DOI: 10.1109/16.405274 |
0.614 |
|
1995 |
Hong G-, Fossum JG. Implementation of nonlocal model for impact-ionization current in bipolar circuit simulation and application to SiGe HBT design optimization Ieee Transactions On Electron Devices. 42: 1166-1173. DOI: 10.1109/16.387252 |
0.511 |
|
1995 |
Suh D, Fossum JG. A Physical Charge-Based Model for Non-Fully Depleted SOI MOSFET's and Its Use in Assessing Floating-Body Effects in SOI CMOS Circuits Ieee Transactions On Electron Devices. 42: 728-737. DOI: 10.1109/16.372078 |
0.583 |
|
1995 |
Cho H, Fossum JG. A physical and computationally efficient methodology for statistical circuit simulation in bipolar technologies Solid-State Electronics. 38: 1065-1073. DOI: 10.1016/0038-1101(95)98676-T |
0.458 |
|
1994 |
Suh D, Fossum JG. The Effect of Body Resistance on the Breakdown Characteristics of SOI MOSFET’s Ieee Transactions On Electron Devices. 41: 1063-1066. DOI: 10.1109/16.293322 |
0.483 |
|
1994 |
Ugajin M, Hong G, Fossum JG. Inverse base-width modulation and collector space-charge-region widening: degrading effects at high current densities in highly scaled BJT's (and HBT's) Ieee Transactions On Electron Devices. 41: 266-268. DOI: 10.1109/16.277368 |
0.46 |
|
1993 |
Green KR, Fossum JG. A simple two-dimensional model for subthreshold channel-length modulation in short-channel MOSFETs Ieee Transactions On Electron Devices. 40: 1560-1563. DOI: 10.1109/16.223724 |
0.436 |
|
1993 |
Jin J, Fossum JG. Analytic accounting for carrier velocity overshoot in advanced BJT's for circuit simulation Ieee Transactions On Electron Devices. 40: 789-795. DOI: 10.1109/16.202792 |
0.477 |
|
1993 |
Fossum JG, Yeh P-, Choi J-. Computer-aided performance assessment of fully depleted SOI CMOS VLSI circuits Ieee Transactions On Electron Devices. 40: 598-604. DOI: 10.1109/16.199366 |
0.545 |
|
1993 |
Fossum JG, Krishnan S. Current-drive enhancement limited by carrier velocity saturation in deep-submicrometer fully depleted SOI MOSFETs Ieee Transactions On Electron Devices. 40: 457-459. DOI: 10.1109/16.182529 |
0.446 |
|
1993 |
Fossum JG. Modeling and simulation of thin SOI MOSFET's: concepts, tools, and results Microelectronic Engineering. 22: 323-330. DOI: 10.1016/0167-9317(93)90181-4 |
0.489 |
|
1992 |
Cho H, Fossum JG. Polysilicon emitter design for scaled BiCMOS circuits Solid-State Electronics. 35: 1277-1284. DOI: 10.1016/0038-1101(92)90162-6 |
0.531 |
|
1991 |
Kim Y-, Fossum JG, Williams RK. New physical insights and models for high-voltage LDMOST IC CAD Ieee Transactions On Electron Devices. 38: 1641-1649. DOI: 10.1109/16.85161 |
0.53 |
|
1991 |
Choi JY, Fossum JG. Analysis and Control of Floating-Body Bipolar Effects in Fully Depleted Submicrometer SOI MOSFET’s Ieee Transactions On Electron Devices. 38: 1384-1391. DOI: 10.1109/16.81630 |
0.546 |
|
1990 |
Kim Y-, Fossum JG. Physical DMOST modeling for high-voltage IC CAD Ieee Transactions On Electron Devices. 37: 797-803. DOI: 10.1109/16.47788 |
0.539 |
|
1990 |
Fossum JG, Choi J-, Sundaresan R. SOI design for competitive CMOS VLSI Ieee Transactions On Electron Devices. 37: 724-729. DOI: 10.1109/16.47778 |
0.472 |
|
1990 |
Jeong H, Fossum JG, FitzPatrick DK. MMSPICE: A semi-numerical mixed-mode device/circuit simulator for advanced bipolar technology CAD Solid-State Electronics. 33: 1283-1291. DOI: 10.1016/0038-1101(90)90032-A |
0.448 |
|
1989 |
Jeong H, Fossum JG. A charge-based large-signal bipolar transistor model for device and circuit simulation Ieee Transactions On Electron Devices. 36: 124-131. DOI: 10.1109/16.21191 |
0.508 |
|
1989 |
Veeraraghavan S, Fossum JG. Short-channel effects in SOI MOSFETs Ieee Transactions On Electron Devices. 36: 522-528. DOI: 10.1109/16.19963 |
0.468 |
|
1988 |
Fossum JG, Kim Y. Static and dynamic latchup in the LIGBT Ieee Transactions On Electron Devices. 35: 1977-1985. DOI: 10.1109/16.7413 |
0.502 |
|
1988 |
Fossum JG, Mcdonald RJ. An Insightful Analysis of the Hybrid Insulated-Gate Bipolar Transistor Ieee Transactions On Electron Devices. 35: 1560-1562. DOI: 10.1109/16.2593 |
0.507 |
|
1988 |
Fossum JG, Mcdonald RJ, Shibib MA. Network Representations of LIGBT Structures for CAD of Power Integrated Circuits Ieee Transactions On Electron Devices. 35: 507-515. DOI: 10.1109/16.2486 |
0.52 |
|
1987 |
Jeong H, Fossum JG. Physical modeling of high-current transients for bipolar transistor circuit simulation Ieee Transactions On Electron Devices. 34: 898-905. DOI: 10.1109/T-Ed.1987.23013 |
0.488 |
|
1987 |
Fossum JG, Sundaresan R, Matloubian M. Anomalous subthreshold current—Voltage characteristics of n-channel SOI MOSFET's Ieee Electron Device Letters. 8: 544-546. DOI: 10.1109/Edl.1987.26722 |
0.488 |
|
1986 |
Fossum JG, Jeong H, Veeraraghavan S. Significance of the channel—Charge partition in the transient MOSFET model Ieee Transactions On Electron Devices. 33: 1621-1623. DOI: 10.1109/T-Ed.1986.22716 |
0.388 |
|
1986 |
Ortiz-Conde A, Fossum JG. Subthreshold behavior of thin-film LPCVD PolySilicon MOSFET's Ieee Transactions On Electron Devices. 33: 1563-1571. DOI: 10.1109/T-Ed.1986.22708 |
0.423 |
|
1986 |
Fossum JG, Mcdonald RJ. Charge-Control Analysis of the COMFET Turn-Off Transient Ieee Transactions On Electron Devices. 33: 1377-1382. DOI: 10.1109/T-Ed.1986.22673 |
0.398 |
|
1986 |
Fossum JG, Veeraraghavan S. Partitioned-charge-based modeling of bipolar transistors for non-quasi-static circuit simulation Ieee Electron Device Letters. 7: 652-654. DOI: 10.1109/Edl.1986.26508 |
0.388 |
|
1986 |
Yung SY, Burk DE, Fossum JG. Numerical simulation of temperature-dependent minority-hole transport in n+ silicon emitters Solid State Electronics. 29: 1243-1251. DOI: 10.1016/0038-1101(86)90130-9 |
0.389 |
|
1985 |
Fossum JG, Ortiz-Conde A, Shichijo H, Banerjee SK. Anomalous leakage current in LPCVD PolySilicon MOSFET's Ieee Transactions On Electron Devices. 32: 1878-1884. DOI: 10.1109/T-Ed.1985.22212 |
0.446 |
|
1985 |
Fossum JG, Burk DE, Yung SY. Effective Minority-Carrier Mobility in Heavily Doped Silicon Defined by Trapping and Energy-Gap Narrowing Ieee Transactions On Electron Devices. 32: 1874-1877. DOI: 10.1109/T-Ed.1985.22211 |
0.368 |
|
1985 |
McDonald RJ, Fossum JG, Shibib MA. A physical model for the conductance of gated p-i-n switches Ieee Transactions On Electron Devices. 32: 1314-1320. DOI: 10.1109/T-Ed.1985.22117 |
0.407 |
|
1985 |
Lim HK, Fossum JG. A Charge-Based Large-Signal Model for Thin-Film SOI MOSFET’s Ieee Transactions On Electron Devices. 32: 446-457. DOI: 10.1109/T-Ed.1985.21962 |
0.489 |
|
1985 |
Lim HK, Fossum JG. A Charge-Based Large-Signal Model for Thin-Film SOI MOSFET's Ieee Journal of Solid-State Circuits. 20: 366-377. DOI: 10.1109/Jssc.1985.1052316 |
0.495 |
|
1985 |
Cuevas A, Fossum JG, Young RT. Influence of the dopant density profile on minority-carrier current in shallow, heavily doped emitters of silicon bipolar devices Solid-State Electronics. 28: 247-254. DOI: 10.1016/0038-1101(85)90005-X |
0.398 |
|
1984 |
Lim HK, Fossum JG. Transient Drain Current and Propagation Delay in SOI CMOS Ieee Transactions On Electron Devices. 31: 1251-1258. DOI: 10.1109/T-Ed.1984.21696 |
0.483 |
|
1984 |
Lim HK, Fossum JG. Current-Voltage Characteristics of Thin-Film SOI MOSFET's in Strong Inversion Ieee Transactions On Electron Devices. 31: 401-408. DOI: 10.1109/T-Ed.1984.21540 |
0.52 |
|
1983 |
Lim HK, Member S, Fossum JG. Threshold Voltage of Thin-Film Silicon-on-lnsulator (SOI) MOSFET's Ieee Transactions On Electron Devices. 30: 1244-1251. DOI: 10.1109/T-Ed.1983.21282 |
0.5 |
|
1983 |
Fossum JG, Ortiz-Conde A. Effects of grain boundaries on the channel conductance of SOl MOSFET's Ieee Transactions On Electron Devices. 30: 933-940. DOI: 10.1109/T-Ed.1983.21240 |
0.41 |
|
1983 |
Ortiz-Conde A, Fossum JG. Moderate inversion in SOI MOSFET's with grain boundaries Ieee Electron Device Letters. 4: 344-346. DOI: 10.1109/Edl.1983.25757 |
0.369 |
|
1983 |
Fossum JG, Lim HK, Ortiz-Conde A. Linear-Region Conductance of Thin-Film SOI MOSFET's with Grain Boundaries Ieee Electron Device Letters. 4: 239-242. DOI: 10.1109/Edl.1983.25718 |
0.338 |
|
1983 |
Fossum JG, Mertens RP, Lee DS, Nijs JF. Carrier recombination and lifetime in highly doped silicon Solid State Electronics. 26: 569-576. DOI: 10.1016/0038-1101(83)90173-9 |
0.323 |
|
1982 |
Fossum JG, Sundaresan R. Analysis of minority-carrier transport in polysilicon devices Ieee Transactions On Electron Devices. 29: 1185-1197. DOI: 10.1109/T-Ed.1982.20855 |
0.338 |
|
1982 |
Fossum JG, Lee DS. A physical model for the dependence of carrier lifetime on doping density in nondegenerate silicon Solid-State Electronics. 25: 741-747. DOI: 10.1016/0038-1101(82)90203-9 |
0.369 |
|
1981 |
Fossum JG, Shibib MA. An analytic model for minority-carrier transport in heavily doped regions of silicon devices Ieee Transactions On Electron Devices. 28: 1018-1025. DOI: 10.1109/T-Ed.1981.20478 |
0.415 |
|
1981 |
Marshak AH, Shibib MA, Fossum JG, Lindholm FA. Rigid band analysis of heavily doped semiconductor devices Ieee Transactions On Electron Devices. 28: 293-298. DOI: 10.1109/T-Ed.1981.20331 |
0.38 |
|
1980 |
Fossum JG, Nasby RD, Pao SC. Physics underlying the performance of back-surface-field solar cells Ieee Transactions On Electron Devices. 27: 785-791. DOI: 10.1109/T-Ed.1980.19937 |
0.393 |
|
1980 |
Fossum JG, Lindholm FA. Theory of grain-boundary and intragrain recombination currents in polysilicon p-n-junction solar cells Ieee Transactions On Electron Devices. 27: 692-700. DOI: 10.1109/T-Ed.1980.19924 |
0.341 |
|
1980 |
Fossum JG, Lindholm FA. Effects on the open-circuit voltage of grain boundaries within the junction space-charge region of polycrystalline solar cells Ieee Electron Device Letters. 1: 267-269. DOI: 10.1109/Edl.1980.25314 |
0.425 |
|
1980 |
Fossum JG, Neugroschel A, Lindholm FA. A unifying study of tandem-junction, front-surface-field, and interdigitated-back-contact solar cells Solid-State Electronics. 23: 1127-1138. DOI: 10.1016/0038-1101(80)90023-4 |
0.354 |
|
1979 |
Shibib MA, Lindholm FA, Fossum JG. Correction to "Auger recombination in heavily doped shallow-emitter silicon p-n-junction solar cells, diodes, and transistors" Ieee Transactions On Electron Devices. 26: 1978-1978. DOI: 10.1109/T-Ed.1979.19806 |
0.386 |
|
1979 |
Fossum JG, Lindholm FA, Shibib MA. The importance of surface recombination and energy-bandgap arrowing in p-n-junction silicon solar cells Ieee Transactions On Electron Devices. 26: 1294-1298. DOI: 10.1109/T-Ed.1979.19596 |
0.456 |
|
1979 |
Shibib MA, Lindholm FA, Fossum JG. Auger recombination in heavily doped shallow-emitter silicon p-n-junction solar cells, diodes, and transistors Ieee Transactions On Electron Devices. 26: 1104-1106. DOI: 10.1109/T-Ed.1979.19555 |
0.464 |
|
1978 |
Sah CT, Lindholm FA, Fossum JG. A High-Low Junction Emitter Structure for Improving Silicon Solar Cell Efficiency Ieee Transactions On Electron Devices. 25: 66-67. DOI: 10.1109/T-Ed.1978.19036 |
0.411 |
|
Low-probability matches (unlikely to be authored by this person) |
1987 |
Fossum JG, McDonald RJ. IIB-3 Analysis of the Unique Characteristics of the Hybrid LIGT/DMOST (HIGT) Ieee Transactions On Electron Devices. 34: 2359-2360. DOI: 10.1109/T-Ed.1987.23254 |
0.227 |
|
Hide low-probability matches. |